MPC9772AE Freescale Semiconductor, MPC9772AE Datasheet - Page 10
MPC9772AE
Manufacturer Part Number
MPC9772AE
Description
IC PLL CLK GENERATOR 1:12 52LQFP
Manufacturer
Freescale Semiconductor
Type
Clock Generator, Fanout Distribution, Multiplexer , Zero Delay Bufferr
Datasheet
1.MPC9772FA.pdf
(16 pages)
Specifications of MPC9772AE
Pll
Yes with Bypass
Input
LVCMOS
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
3:12
Differential - Input:output
No/No
Frequency - Max
240MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Frequency-max
240MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC9772AE
Manufacturer:
IDT
Quantity:
465
Company:
Part Number:
MPC9772AE
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
MPC9772AER2
Manufacturer:
IDT
Quantity:
1 539
Company:
Part Number:
MPC9772AER2
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
MOTOROLA
SYNC Output Description
QSYNC. In configurations with the output frequency
relationships are not integer multiples of each other QSYNC
provides a signal for system synchronization purposes. The
MPC9772 monitors the relationship between the A bank and
the B bank of outputs. The QSYNC output is asserted (logic
low) one period in duration and one period prior to the
MPC9772
The MPC9772 has a system synchronization pulse output
QA(÷12)
QSYNC
QSYNC
QSYNC
QSYNC
QSYNC
QSYNC
QSYNC
QC(÷2)
QC(÷6)
QC(÷2)
QC(÷8)
QC(÷2)
QA(÷6)
QA(÷4)
QA(÷8)
QA(÷6)
f
VCO
QC
QC
QA
QA
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 6. QSYNC Timing Diagram
Go to: www.freescale.com
1:1 Mode
2:1 Mode
3:1 Mode
3:2 Mode
4:1 Mode
4:3 Mode
6:1 Mode
10
coincident rising edges of the QA and QC outputs. The duration
and the placement of the pulse is dependent QA and QC output
frequencies: the QSYNC pulse width is equal to the period of
the higher of the QA and QC output frequencies. Figure 6
shows various waveforms for the QSYNC output. The QSYNC
output is defined for all possible combinations of the bank A and
bank C outputs.
TIMING SOLUTIONS