IDT82V3285DQG IDT, Integrated Device Technology Inc, IDT82V3285DQG Datasheet - Page 66

• Manufacturer Part Number: IDT82V3285DQG
• Description: IC PLL WAN STRATUM 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3285DQG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 100
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3285DQG

DIFFERENTIAL_IN_OUT_OSCI_CNFG - Differential Input / Output Port & Master Clock Configuration
Programming Information
IDT82V3285
Address: 0AH
Type: Read / Write
Default Value: XXXXX001
7 - 3
Bit
2
1
0
7
-
OUT5_PECL_LVDS
OUT4_PECL_LVDS
OSC_EDGE
Name
-
6
-
Reserved.
This bit selects a better active edge of the master clock.
0: The rising edge. (default)
1: The falling edge.
This bit selects a port technology for OUT5.
0: LVDS. (default)
1: PECL.
This bit selects a port technology for OUT4.
0: LVDS.
1: PECL. (default)
5
-
4
-
66
3
-
Description
OSC_EDGE
2
OUT5_PECL_LVDS
1
OUT4_PECL_LVDS
April 11, 2007
0
WAN PLL