STW81102ATR STMicroelectronics, STW81102ATR Datasheet - Page 28

• Manufacturer Part Number: STW81102ATR
• Description: IC SYNTHESIZER MULTI RF 28VFQFPN
• Manufacturer: STMicroelectronics
• Type: Frequency Synthesizerr

Specifications of STW81102ATR

• Pll: Yes
• Input: Clock, Crystal
• Output: Clock, Crystal
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: No/No
• Frequency - Max: 4.65GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VFQFN, 28-VFQFPN
• Frequency-max: 4.65GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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C bus interface
Figure 21. START and STOP conditions
Byte format and acknowledge
Every byte put on the SDA line must be 8 bits long, and be followed by an acknowledge bit
to indicate a successful data transfer. Data is transferred with the most significant bit (MSB)
first. The transmitter releases the SDA line after sending 8 bits of data. During the 9th clock
pulse, the receiver pulls the SDA line low to acknowledge the receipt of 8 bits of data.
Figure 22. Byte format and acknowledge
Device addressing
The master must first initiate with a START condition to communicate with the STW81102,
and then send 8 bits (MSB first) on the SDA line which correspond to the device select
address and the read or write mode.
The first 7 MSBs are the device address identifier, which corresponds to the I2C bus
definition. For the STW81102, the address is set at “1100A2A1A0”, 3 bits programmable.
The 8th bit (LSB) is the read or write (RW) operation bit, which is set to 1 in read mode and
to 0 in write mode.
Following a START condition, the STW81103 identifies the device address on the bus and, if
matched, acknowledges the identification on the SDA bus during the 9th clock pulse.
SDA
SCL
SCL
SDA
START
START
MSB
1
2
3
//
//
7
8
Acknowledgement
from receiver
STOP
9
STW81102