MPC9992ACR2 IDT, Integrated Device Technology Inc, MPC9992ACR2 Datasheet - Page 7

• Manufacturer Part Number: MPC9992ACR2
• Description: IC PLL CLK GEN ECL/PECL 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of MPC9992ACR2

• Pll: Yes with Bypass
• Input: PECL, Crystal
• Output: PECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:7
• Differential - Input:output: Yes/Yes
• Frequency - Max: 400MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDT™ 3.3 V Differential ECL/PECL PLL Clock Generator
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9992
3.3 V Differential ECL/PECL PLL Clock Generator
Advanced Clock Drivers Device Data
Freescale Semiconductor
SYNC Output Description
QSYNC. In configurations with the output frequency
relationships are not integer multiples of each other QSYNC
provides a signal for system synchronization purposes. The
MPC9992 monitors the relationship between the A bank and
The MPC9992 has a system synchronization pulse output
QSYNC
QSYNC
QSYNC
QSYNC
Qa
Qb
Qa
Qb
Qa
Qb
Qa
Qb
APPLICATIONS INFORMATION
Figure 3. QSYNC Timing Diagram
2:1 Mode
3:1 Mode
3:2 Mode
5:2 Mode
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the B bank of outputs. The QSYNC output is asserted (logic
high) one QA period in duration. The placement of the pulse
is dependent on the QA and QB output frequencies ratio.
Figure 3
QSYNC output is defined for all possible combinations of the
bank A and bank B outputs.
shows the waveforms for the QSYNC output. The
MPC9992
NETCOM
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MPC9992