ICS932S421BGLF IDT, Integrated Device Technology Inc, ICS932S421BGLF Datasheet - Page 12

• Manufacturer Part Number: ICS932S421BGLF
• Description: IC PCIE GEN2 MAIN CLOCK 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generatorr
• Series: -r

Specifications of ICS932S421BGLF

• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 400MHz
• Number Of Elements: 3
• Supply Current: 350mA
• Pll Input Freq (min): 14.31818MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSSOP
• Output Frequency Range: 33.33 to 400MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 56
• Input: -
• Output: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output: -
• Input: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 932S421BGLF

IDT
ICS932S421B
PCIe Gen2 and QPI Clock for Intel-Based Servers
TM
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the beginning byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
PCIe Gen2 and QPI Clock for Intel-Based Servers
Byte N + X -1
(see Note 2)
WR
T
P
Beginning Byte N
General SMBus serial interface information for the ICS932S421B
Data Byte Count = X
Slave Address D2
Beginning Byte = N
Controller (Host)
Byte N + X - 1
Index Block Write Operation
starT bit
stoP bit
WRite
(H)
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(H)
12
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RD
RT
N
T
P
Slave Address D2
Slave Address D3
Beginning Byte = N
Controller (Host)
Index Block Read Operation
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(H)
(H)
.
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
1340G—01/26/10
(H)
(H)
(H)