IDT8737-11PGG8 IDT, Integrated Device Technology Inc, IDT8737-11PGG8 Datasheet - Page 6

• Manufacturer Part Number: IDT8737-11PGG8
• Description: IC CLK GEN DIFF-LVPECL 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Divider, Multiplexerr

Specifications of IDT8737-11PGG8

• Number Of Circuits: 1
• Ratio - Input:output: 2:4
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 650MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 650MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8737-11PGG8

DC ELECTRICAL CHARACTERISTICS, LVPECL- INDUSTRIAL
NOTES:
1. For single-ended applications, the max. input voltage for PCLK / xPCLK is V
2. Common mode voltage is defined as V
3. Outputs terminated with 50Ω to V
NOTES:
1. Measured from the differential input crossingpoint to the differential output crossingpoint.
2. Defined as skew between outputs as the same supply voltage and with equal load conditions. Measured at the output differential crosspoints
3. Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each
4. This parameter is defined in accordance with JEDEC Standard 65.
AC ELECTRICAL CHARACTERISTICS - INDUSTRIAL
All parameters measured at 500MHz unless noted otherwise;
cycle-to-cycle jitter = jitter on output; the part does not add jitter
IDT8737-11
LOW SKEW, ÷ ÷ ÷ ÷ ÷ 1/÷ ÷ ÷ ÷ ÷ 2 DIFFERENTIAL-TO-3.3V LVPECL
Symbol
Symbol
device, the outputs are measured at the differential crosspoints.
V
t
V
F
t
SWING
t
SK
V
V
V
SK
SK
odc
CMR
t
I
I
MAX
PD
t
t
IH
OH
IL
PP
OL
(
R
F
(
(
PP
O
B
)
)
)
Parameter
Input Current HIGH
Input Current LOW
Peak-to-Peak Input Voltage
Common Mode Input Voltage
Output Voltage HIGH
Output Voltage LOW
Peak-to-Peak Output Voltage Swing
Parameter
Output Frequency
Propagation Delay
Output Skew
Bank Skew
Part-to-Part Skew
Output Rise Time
Output Fall Time
Output Duty Cycle
(4)
(2,4)
DD
(3,4)
(1)
- 0.2V.
(3)
(3)
IH
.
PCLK
xPCLK
PCLK
xPCLK
(1,2)
CLK, xCLK
PCLK, xPCLK
Bank A
Bank B
V
V
IN
IN
V
V
Test Conditions
IN
IN
= 0V, V
= 0V, V
DD
= V
= V
20 - 80% @ 50MHz
20 - 80% @ 50MHz
Test Conditions
+ 0.3V.
DD
DD
f ≤ 650MHz
DD
DD
= 3.465V
= 3.465V
6
= 3.465V
= 3.465V
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
V
V
V
EE
DD
Min.
Min.
-150
DD
300
300
0.3
0.6
47
-5
1
1
+ 1.5
- 1.4
- 2
Typ.
Typ.
50
V
V
DD
Max.
Max.
DD
V
150
650
300
700
700
0.9
1.8
1.7
75
30
45
53
5
1
DD
- 1.7
- 1
MHz
Unit
Unit
μA
μA
%
ns
ps
ps
ps
ps
ps
V
V
V
V
V