74HCT9046APW,112 NXP Semiconductors, 74HCT9046APW,112 Datasheet - Page 35

IC PLL W/BAND GAP VCO 16-TSSOP

74HCT9046APW,112

Manufacturer Part Number
74HCT9046APW,112
Description
IC PLL W/BAND GAP VCO 16-TSSOP
Manufacturer
NXP Semiconductors
Type
Phase Lock Loop (PLL)r
Series
74HCTr
Datasheet

Specifications of 74HCT9046APW,112

Number Of Circuits
1
Package / Case
16-TSSOP
Pll
Yes
Input
Clock
Output
Clock
Ratio - Input:output
2:2
Differential - Input:output
No/No
Frequency - Max
16MHz
Divider/multiplier
No/No
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Frequency-max
16MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
4.5 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-2914-5
935221200112
NXP Semiconductors
74HCT9046A_6
Product data sheet
Rewriting the equation for natural frequency results in:
The maximum overshoot occurs at N
When C2 = 470 nF, it follows:
Hence the current source bias resistance
With
For extra ripple suppression a capacitor C3 can be connected in parallel with R4, with an
extra
For stability reasons
R3‘
R
R4
1
1
2
bias
n
=
=
=
=
=
=
K
-------------------------------- -
0.4 2.24 10
-------------------------------------- -
-------------------------
0.5 5000
=
5
-- -
------ -
C2
t
3
= 0.707 (0.5
------ -
C2
p
2
5000
0.707
= R4
17 2550
=
1
=
K
------------ -
0.001
=
n
v
2
5
------------------------- -
470 10
2
------------------------- -
470 10
0.00028
C3.
K
0.0012
30
=
=
n
=
0.00028
6
5 10
43 k
Rev. 06 — 15 September 2009
9 –
=
3
9 –
2
should be < 0.1
=
0.0012
=
3
600
r s
2550
n
) it follows:
max
2
= 30; hence K
, hence C3 < 0.1C2 or C3 = 39 nF.
PLL with band gap controlled VCO
n
=
1
30:
74HCT9046A
© NXP B.V. 2009. All rights reserved.
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