74HCT9046APW,112 NXP Semiconductors, 74HCT9046APW,112 Datasheet - Page 19
![IC PLL W/BAND GAP VCO 16-TSSOP](/photos/6/56/65607/568-16-tssop_sot403-1_sml.jpg)
74HCT9046APW,112
Manufacturer Part Number
74HCT9046APW,112
Description
IC PLL W/BAND GAP VCO 16-TSSOP
Manufacturer
NXP Semiconductors
Type
Phase Lock Loop (PLL)r
Series
74HCTr
Datasheet
1.74HCT9046AD118.pdf
(43 pages)
Specifications of 74HCT9046APW,112
Number Of Circuits
1
Package / Case
16-TSSOP
Pll
Yes
Input
Clock
Output
Clock
Ratio - Input:output
2:2
Differential - Input:output
No/No
Frequency - Max
16MHz
Divider/multiplier
No/No
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Frequency-max
16MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
4.5 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-2914-5
935221200112
935221200112
NXP Semiconductors
74HCT9046A_6
Product data sheet
Fig 14. Typical input resistance curve at SIG_IN and
Fig 16. Input current at SIG_IN; COMP_IN with
(0.5 V
( A)
I
I
I
I
5
0
5
CC
COMP_IN
)
V
4.5 V
5.5 V
I
0.25
= 0.5 V at self-bias point
V
I
0.5 V CC
V
CC
self-bias operating point
= 5.5V
V
I
(V)
4.5 V
(0.5 V
mga957
V
Rev. 06 — 15 September 2009
mbd108
I
CC
) + 0.25
Fig 15. Input resistance at SIG_IN; COMP_IN with
Fig 17. Offset voltage at demodulator output as a
V
(mV)
(0.5 V
(k )
offset
R
I
800
600
400
200
60
40
20
20
40
0
0
CC
(0.5 V
___ R
- - - R
function of VCO_IN and R
)
V
I
0.25
= 0.5 V at self-bias point
CC
s
s
)
= 300 k
= 50 k
5.5 V
2
V
PLL with band gap controlled VCO
CC
=
4.5 V
0.5 V
0.5 V
74HCT9046A
CC
CC
V
VCO_IN
V
s
I
(V)
(V)
V
4.5 V
© NXP B.V. 2009. All rights reserved.
(0.5 V
5.5 V
CC
mga956 - 1
(0.5 V
=
mga958
CC
) + 2
CC
) + 0.25
19 of 43