ICS853L022AMLF IDT, Integrated Device Technology Inc, ICS853L022AMLF Datasheet - Page 6

• Manufacturer Part Number: ICS853L022AMLF
• Description: IC TRANSLATOR LVPECL 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Translatorr

Specifications of ICS853L022AMLF

• Number Of Circuits: 2
• Ratio - Input:output: 1:2
• Differential - Input:output: No/Yes
• Input: LVCMOS, LVTTL
• Output: LVPECL
• Frequency - Max: 350MHz
• Voltage - Supply: 3 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 350MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 853L022AMLF

T
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that gen-
erate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must
be used for functionality. These outputs are designed to drive
853L022AG
RTT =
ERMINATION FOR
((V
F
FOUT
OH
IGURE
+ V
OL
Integrated
Circuit
Systems, Inc.
1A. LVPECL O
) / (V
1
CC
3.3V LVPECL O
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
T
A
RTT
ERMINATION
50
UTPUTS
PPLICATION
www.icst.com/products/hiperclocks.html
V
CC
FIN
- 2V
6
I
NFORMATION
50 transmission lines. Matched impedance techniques should
be used to maximize operating frequency and minimize signal
distortion. Figures 1A and 1B show two different layouts which
are recommended only as guidelines. Other suitable clock lay-
outs may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
D
UAL
FOUT
F
LVCMOS / LVTTL-
IGURE
1B. LVPECL O
Z
Z
3.3V LVPECL T
o
o
= 50
= 50
125
84
UTPUT
ICS853L022
3.3V
TO
125
84
T
REV. A OCTOBER 29, 2008
-D
ERMINATION
IFFERENTIAL
RANSLATOR
FIN