ICS85354AKLFT IDT, Integrated Device Technology Inc, ICS85354AKLFT Datasheet - Page 10

• Manufacturer Part Number: ICS85354AKLFT
• Description: IC MUX DUAL 2:1 1:2 16-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Multiplexerr

Specifications of ICS85354AKLFT

• Number Of Circuits: 2
• Ratio - Input:output: 2:1, 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL
• Output: LVPECL
• Frequency - Max: 3.2GHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-VFQFN
• Frequency-max: 3.2GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 85354AKLFT

Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and FOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50Ω
Figure 4A. 3.3V LVPECL Output Termination
IDT™ / ICS™ LVPECL/ECL MULTIPLEXER
ICS85354
DUAL 2:1 AND 1:2, DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
RTT =
((V
FOUT
OH
+ V
OL
) / (V
1
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
Z
o
50Ω
RTT
50Ω
V
CC
FIN
- 2V
10
transmission lines. Matched impedance techniques should be
used to maximize operating frequency and minimize signal
distortion. Figures 4A and 4B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and
clock component process variations.
Figure 4B. 3.3V LVPECL Output Termination
FOUT
Z
Z
o
o
= 50Ω
= 50Ω
ICS85354AK REV. C NOVEMBER 04, 2008
125Ω
84Ω
3.3V
125Ω
84Ω
FIN