ICS854058AGLF IDT, Integrated Device Technology Inc, ICS854058AGLF Datasheet - Page 9

• Manufacturer Part Number: ICS854058AGLF
• Description: IC CLOCK MUX 8:1 24-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Multiplexerr

Specifications of ICS854058AGLF

• Number Of Circuits: 1
• Ratio - Input:output: 8:1
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL, SSTL
• Output: LVDS
• Frequency - Max: 2.5GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Frequency-max: 2.5GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 854058AGLF

854058AG
S
An application schematic example of ICS854058 is shown
in Figure 4. The inputs can accept various types of differential
signals. In this example, the inputs are driven by LVDS drivers.
The transmission lines are assumed to be 100
The 100
CHEMATIC
LVDS
LVDS
matched loads termination should be located
E
XAMPLE
Integrated
Circuit
Systems, Inc.
100 Ohm Differential
100 Ohm Differential
Zo = 50
Zo = 50
Zo = 50
Zo = 50
R2
100
C1
0.1u
F
3.3V
IGURE
www.icst.com/products/hiperclocks.html
PRELIMINARY
10
11
12
1
2
3
4
5
6
7
8
9
U1
4. ICS854058 S
PCLK0
nPCLK0
PCLK1
nPCLK1
VDD
SEL0
SEL1
SEL2
PCLK2
nPCLK2
PCLK3
nPCLK3
differential.
ICS854058
D
9
nPCLK7
nPCLK6
nPCLK5
nPCLK4
IFFERENTIAL
near the receivers. It is recommended at least one
decoupling capacitor per power pin. The decoupling ca-
pacitor should be low ESR and located as close as pos-
sible to the power pin.
PCLK7
PCLK6
PCLK5
PCLK4
GND
VDD
nQ0
CHEMATIC
R1
100
Q0
24
23
22
21
20
19
18
17
16
15
14
13
E
XAMPLE
3.3V
0.1u
-
TO
C2
-LVDS C
Logic Control Input Examples
VDD
RU1
1K
RD1
Not Install
100 Ohm Differential
Set Logic
Input to
'1'
Zo = 50
Zo = 50
To Logic
Input
pins
LOCK
R3
100
ICS854058
VDD
REV. A OCTOBER 29, 2008
M
RU2
Not Install
RD2
1K
ULTIPLEXER
+
-
Set Logic
Input to
'0'
To Logic
Input
pins
LVDS
8:1