ICS8531AY-01T IDT, Integrated Device Technology Inc, ICS8531AY-01T Datasheet - Page 11

• Manufacturer Part Number: ICS8531AY-01T
• Description: IC FANOUT BUFFER 1-9 32-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS8531AY-01T

• Number Of Circuits: 1
• Ratio - Input:output: 2:9
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 500MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 500MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 500MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 8531AY-01T

T
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
designed to drive 50Ω transmission lines. Matched imped-
IDT
ERMINATION FOR
ICS8531-01
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
™
RTT =
/ ICS
™
((V
F
1-TO-9, 3.3V LVPECL FANOUT BUFFER
FOUT
OH
IGURE
+ V
OL
5A. LVPECL O
) / (V
LVPECL O
1
CC
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
Z
UTPUTS
o
50Ω
UTPUT
T
RTT
ERMINATION
50Ω
V
CC
FIN
- 2V
11
ance techniques should be used to maximize operating fre-
quency and minimize signal distortion. Figures 5A and 5B
show two different layouts which are recommended only as
guidelines. Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
FOUT
F
IGURE
5B. LVPECL O
Z
Z
o
o
= 50Ω
= 50Ω
ICS8531AY-01 REV. F APRIL 11, 2007
125Ω
84Ω
UTPUT
3.3V
125Ω
84Ω
T
ERMINATION
FIN