ICS858012AKLF IDT, Integrated Device Technology Inc, ICS858012AKLF Datasheet - Page 11

• Manufacturer Part Number: ICS858012AKLF
• Description: IC FANOUT BUFFER 1-2 16-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS858012AKLF

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 2GHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-VFQFN
• Frequency-max: 2GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 858012AKLF

This section provides information on power dissipation and junction temperature for the ICS858012.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS858012 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
moderate air flow of 0 linear feet per minute and a multi-layer board, the appropriate value is 51.5°C/W per Table 4 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
858012AK
ABLE
•
•
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.169W * 51.5°C/W = 93.7°C. This is well below the limit of 125°C.
JA
A
Multi-Layer PCB, JEDEC Standard Test Boards
4. T
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30.2mW = 60.4mW
Total Power
HERMAL
R
ESISTANCE
MAX
_MAX
MAX
= V
(3.63V, with all outputs switching) = 108.9mW + 60.4mW = 169.3mW
= 30.2mW/Loaded Output pair
CC_MAX
θ θ θ θ θ
JA
FOR
* I
θ θ θ θ θ
EE_MAX
JA
16 L
at 0 Air Flow (Linear Feet per Minute)
CC
P
JA
= 3.63V * 30mA = 108.9mW
EAD
PRELIMINARY
= 3.63V, which gives worst case results.
* Pd_total + T
OWER
VFQFN, F
C
A
ORCED
ONSIDERATIONS
11
C
51.5°C/W
ONVECTION
0
2.5V, 3.3V LVPECL F
L
TM
OW
devices is 125°C.
S
KEW
, 1-
TO
JA
-2, D
must be used. Assuming a
ICS858012
IFFERENTIAL
ANOUT
REV. A OCTOBER 28, 2008
B
UFFER
-
TO
-