ICS8535AGI-21LFT IDT, Integrated Device Technology Inc, ICS8535AGI-21LFT Datasheet - Page 10

IC CLOCK GEN 1-2 LVPECL 14-TSSOP

ICS8535AGI-21LFT

Manufacturer Part Number
ICS8535AGI-21LFT
Description
IC CLOCK GEN 1-2 LVPECL 14-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Multiplexerr
Series
HiPerClockS™r
Datasheet

Specifications of ICS8535AGI-21LFT

Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
No/Yes
Input
LVCMOS, LVTTL
Output
LVPECL
Frequency - Max
266MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Frequency-max
266MHz
Number Of Clock Inputs
2
Mode Of Operation
Single-Ended
Output Frequency
266MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
LVCMOS/LVTTL
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
8535AGI-21LFT
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8535I-21.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8535I-21 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
and a multi-layer board, the appropriate value is 103.8°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 6. Thermal Resitance
IDT™ / ICS™ 3.3V LVPECL FANOUT BUFFER
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
ICS8535I-21
LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
Power Dissipation.
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30mW = 60mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.233W * 103.8°C/W = 109.2°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.3V, with all outputs switching) = 173.25mW + 60mW = 233.25mW
MAX
MAX
= V
= 30mW/Loaded Output pair
CC_MAX
θ
JA
for 14 Lead TSSOP, Forced Convection
* I
EE_MAX
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 50mA = 173.25mW
* Pd_total + T
θ
103.8°C/W
JA
vs. Air Flow
A
0
10
99.6°C/W
1
ICS8535AGI-21 REV. A NOVEMBER 24, 2008
JA
must be used. Assuming no air flow
97.3°C/W
2.5

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