ICS83026BMI-01LF IDT, Integrated Device Technology Inc, ICS83026BMI-01LF Datasheet - Page 10

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ICS83026BMI-01LF

Manufacturer Part Number
ICS83026BMI-01LF
Description
IC CLK BUFFER 350MHZ 1:1 8-SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of ICS83026BMI-01LF

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/No
Input
HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
LVCMOS, LVTTL
Frequency - Max
350MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
350MHz
Number Of Outputs
2
Operating Supply Voltage (max)
3.465V
Operating Temp Range
-40C to 85C
Propagation Delay Time
3.1ns
Operating Supply Voltage (min)
3.135V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
3.3V
Package Type
SOIC N
Duty Cycle
60%
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
83026BMI-01LF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS83026BMI-01LF
Manufacturer:
IDT
Quantity:
10
Part Number:
ICS83026BMI-01LFT
Manufacturer:
PANASONIC
Quantity:
50 000
F
83026BMI-01
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
common driver types. The input interfaces suggested here are
F
F
interface examples for the CLK/nCLK input driven by the most
IGURE
IGURE
PP
IGURE
IFFERENTIAL
3.3V
and V
R5,R6 locate near the driver pin.
3.3V
2C.
LVPECL
2A. CLK/nCLK I
2E. CLK/nCLK I
1.8V
LVPECL
CMR
R5
100 - 200
LVHSTL D
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
CLK/nCLK I
3.3V LVPECL D
input requirements. Figures 2A to 2E show
C
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
I
RIVER
NPUT
NPUT
NPUT
NPUT
RIVER WITH
R1
50
I
D
3.3V
R3
125
RIVER
C1
C2
D
D
NTERFACE
R1
84
RIVEN BY
RIVEN BY
RIVEN BY
SWING
R2
50
3.3V
R3
125
R4
125
R1
84
R2
84
and V
CLK
nCLK
R4
125
AC C
R2
84
CLK
nCLK
3.3V
OH
3.3V
HiPerClockS
Input
must meet the
HiPerClockS
Input
OUPLE
CLK
nCLK
3.3V
D
HiPerClockS
Input
IFFERENTIAL
10
F
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 2A, the input termination applies for LVHSTL
drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
F
IGURE
IGURE
3.3V
3.3V
-
TO
2D.
2B. CLK/nCLK I
LVDS_Driv er
LVPECL
-LVCMOS/LVTTL F
3.3V LVPECL D
CLK/nCLK I
3.3V LVDS D
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
NPUT
NPUT
RIVER
R1
50
R3
50
D
RIVER
ICS83026I-01
D
RIVEN BY
RIVEN BY
L
R2
50
OW
R1
100
CLK
nCLK
ANOUT
3.3V
S
HiPerClockS
KEW
REV. A AUGUST 4, 2010
Input
CLK
nCLK
3.3V
, 1-
B
Receiv er
UFFER
TO
-2

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