ICS83947AYI-147LF IDT, Integrated Device Technology Inc, ICS83947AYI-147LF Datasheet
ICS83947AYI-147LF
Specifications of ICS83947AYI-147LF
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ICS83947AYI-147LF Summary of contents
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G D ENERAL ESCRIPTION The ICS83947I-147 is a low skew, 1-to-9 LVCMOS/LVTTL Fanout Buffer. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from ...
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ABLE IN ESCRIPTIONS ...
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BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, V -0. Package Thermal Impedance, θ JA Storage Temperature, T -65°C to 150°C STG T 4A ...
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T 5A ABLE HARACTERISTICS ...
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The spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most ...
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P ARAMETER 1.65V ± 0.15V DDO LVCMOS GND -1.65V ± 0.15V 3. UTPUT OAD EST IRCUIT PART 1 V DDO Qx 2 PART 2 V DDO sk(pp) P ...
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PPLICATION CHEMATIC XAMPLE Figure 1 shows an example of ICS83947I-147 application sche- matic. In this example, the device is operated at V decoupling capacitors should be located as close as possible to the power pin. The input ...
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ABLE VS IR LOW ABLE FOR JA θ θ θ θ θ Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The ...
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ACKAGE UTLINE UFFIX FOR ABLE ACKAGE ...
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ABLE RDERING NFORMATION ...
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83947AYI-147 ...
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We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...