ICS83905AGILFT IDT, Integrated Device Technology Inc, ICS83905AGILFT Datasheet - Page 12

• Manufacturer Part Number: ICS83905AGILFT
• Description: IC FANOUT BUFFER 1:6 16-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS83905AGILFT

• Number Of Circuits: 1
• Ratio - Input:output: 1:6
• Differential - Input:output: No/No
• Input: Crystal
• Output: LVCMOS, LVTTL
• Frequency - Max: 100MHz
• Voltage - Supply: 1.6 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 100MHz
• Number Of Outputs: 6
• Input Frequency: 40MHz
• Duty Cycle: 53%
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Operating Supply Voltage (min): 1.6V
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 83905AGILFT

IDT™ / ICS™ LOW SKEW, 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTTL FANOUT BUFFER
ICS83905I
LOW SKEW, 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTTL FANOUT BUFFER
L
Figure 2 shows an example of ICS83905I application schematic.
In this example, the device is operated at V
3.3V. The decoupling capacitors should be located as close as
possible to the power pins. The input is driven by an 18pF load
resonant quartz crystal. The tuning capacitors (C1, C2) are fairly
83905AGI
AYOUT
VDDO
G
C2
15pf
UIDELINE
ENABLE 2
Integrated
Circuit
Systems, Inc.
1
2
3
4
5
6
7
8
U1
ICS83905I
VDD
XTAL_OUT
ENABLE 2
GND
BCLK0
VDDO
BCLK1
GND
BCLK2
C3
10uF
CL = 18 pf
C4
.1uF
F
ENABLE 1
XTAL_IN
IGURE
BCLK5
BCLK4
BCLK3
VDDO
GND
VDD
VDDO
http://www.icst.com/products/hiperclocks.html
C5
.1uF
DD
2. Schematic of Recommended Layout
= 3.3V and V
16
15
14
13
12
11
10
9
C6
.1uF
ENABLE 1
C1
15pF
VDDO = 3.3V
DDO
=
12
VDD = 3.3V
12
accurate, but minor adjustments might be required. For the
LVCMOS output drivers, two termination examples are shown
in the schematic. For additional termination, examples are shown
in the LVCMOS Termination Application Note.
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
L
OW
LVCMOS / LVTTL F
R2
31
S
KEW
Optional Termination
Zo = 50 Ohm
Zo = 50 Ohm
, 1:6 C
VDD
R3
100
R4
100
RYSTAL
LVCMOS
LVCMOS
ANOUT
I
NTERFACE
REV. B MAY 16, 2005
B
UFFER
-
TO
ICS83905I
TSD
-