AD9512BCPZ Analog Devices Inc, AD9512BCPZ Datasheet - Page 10

• Manufacturer Part Number: AD9512BCPZ
• Description: IC CLOCK DIST 5OUT PLL 48LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of AD9512BCPZ

• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: Yes/Yes
• Input: Clock
• Output: CMOS, LVDS, LVPECL
• Frequency - Max: 1.2GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Frequency-max: 1.2GHz
• Clock Ic Type: Clock Distribution
• Ic Interface Type: Serial
• Frequency: 1.2GHz
• No. Of Outputs: 5
• No. Of Multipliers / Dividers: 5
• Supply Voltage Range: 3.135V To 3.465V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9512/PCB - BOARD EVAL CLOCK 5CHAN 48LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9512
CLOCK OUTPUT ADDITIVE TIME JITTER
Table 5.
Parameter
LVPECL OUTPUT ADDITIVE TIME JITTER
LVDS OUTPUT ADDITIVE TIME JITTER
CLK1 = 622.08 MHz
CLK1 = 622.08 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
CLK1 = 400 MHz
Any LVPECL (OUT0 to OUT2) = 622.08 MHz
Divide Ratio = 1
Any LVPECL (OUT0 to OUT2) = 155.52 MHz
Divide Ratio = 4
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 100 MHz
Both LVDS (OUT3, OUT4) = 100 MHz
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 50 MHz
Both LVDS (OUT3, OUT4) = 50 MHz
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 50 MHz
Both CMOS (OUT3, OUT4) = 50 MHz (B Outputs Off)
Any LVPECL (OUT0 to OUT2) = 100 MHz
Divide Ratio = 4
Other LVPECL = 50 MHz
Both CMOS (OUT3, OUT4) = 50 MHz (B Outputs On)
LVDS (OUT3) = 100 MHz
Divide Ratio = 4
LVDS (OUT4) = 100 MHz
Divide Ratio = 4
LVDS (OUT3) = 100 MHz
Divide Ratio = 4
LVDS (OUT4) = 50 MHz
All LVPECL = 50 MHz
Rev. A | Page 10 of 48
Min
395
Typ
215
215
222
225
225
264
319
40
55
Max
Unit
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Test Conditions/Comments
BW = 12 kHz − 20 MHz (OC-12)
BW = 12 kHz − 20 MHz (OC-3)
Calculated from SNR of ADC method;
F
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
Calculated from SNR of ADC method;
F
Calculated from SNR of ADC method;
F
Calculated from SNR of ADC method;
F
Interferer(s)
Interferer(s)
C
C
C
C
C
C
C
C
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
= 100 MHz with A
IN
IN
IN
IN
IN
IN
IN
IN
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz
= 170 MHz