ICS83940DY-01LF IDT, Integrated Device Technology Inc, ICS83940DY-01LF Datasheet - Page 10

• Manufacturer Part Number: ICS83940DY-01LF
• Description: IC CLK FAN BUFF MUX 1:18 32LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS83940DY-01LF

• Number Of Circuits: 1
• Ratio - Input:output: 2:18
• Differential - Input:output: Yes/No
• Input: CML, LVCMOS, LVPECL, LVTTL, SSTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 250MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 250MHz
• Number Of Clock Inputs: 2
• Output Frequency: 250MHz
• Output Logic Level: LVCMOS/LVTTL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1923-2; 83940DY-01LF; ICS83940DY-01LF

LVPECL C
The PCLK /nPCLK accepts LVPECL, CML, SSTL and other
differential signals. Both V
and V
interface examples for the PCLK/nPCLK input driven by the
most common driver types. The input interfaces
F
83940DY-01
F
F
IGURE
IGURE
IGURE
CMR
2A.
2C. PCLK/nPCLK I
2E. PCLK/nPCLK I
3.3V
3.3V
2.5V
input requirements. Figures 2A to 2E show
LVPECL
CML
BY A
BY AN
BY AN
SSTL
PCLK/nPCLK I
LOCK
3.3V LVPECL D
SSTL D
O
Zo = 50 Ohm
Zo = 50 Ohm
I
Zo = 50 Ohm
Zo = 50 Ohm
PEN
Zo = 60 Ohm
Zo = 60 Ohm
NPUT
C
OLLECTOR
SWING
RIVER
I
NTERFACE
NPUT
NPUT
NPUT
3.3V
R1
50
2.5V
R3
120
and V
3.3V
R3
125
R1
120
R1
84
D
D
D
RIVER
R2
50
RIVEN
RIVEN
R4
120
RIVEN
CML D
R2
120
R4
125
OH
R2
84
PCLK
nPCLK
must meet the V
3.3V
PCLK
nPCLK
PCLK
nPCLK
3.3V
HiPerClockS
PCLK/nPCLK
RIVER
3.3V
HiPerClockS
PCLK/nPCLK
Input
HiPerClockS
LVPECL-
www.idt.com
PP
10
suggested here are examples only. If the driver is from
another vendor, use their termination recommendation.
Please consult with the vendor of the driver component to
confirm the driver termination requirements.
F
F
F
IGURE
IGURE
IGURE
3.3V
3.3V
TO
3.3V
3.3V LVPECL
2F. PCLK/nPCLK I
2B. PCLK/nPCLK I
2D. PCLK/nPCLK I
LVDS
-LVCMOS / LVTTL F
CML Built-In Pullup
R5
100 - 200
BY A
BY A
BY A
Zo = 50 Ohm
Zo = 50 Ohm
B
3.3V LVPECL D
3.3V LVDS D
R6
100 - 200
UILT
Zo = 50 Ohm
Zo = 50 Ohm
-I
R5
100
N
Zo = 50 Ohm
Zo = 50 Ohm
P
ULLUP
NPUT
NPUT
NPUT
C1
C2
L
RIVER
C1
C2
ICS83940-01
OW
CML D
D
D
D
3.3V
R3
84
RIVER WITH
R1
125
RIVEN
RIVEN
RIVEN
R1
100
3.3V
R3
1K
R1
1K
S
R4
84
ANOUT
R2
125
KEW
R4
1K
PCLK
nPCLK
RIVER
R2
1K
3.3V
REV. A AUGUST 4, 2010
AC C
PCLK
nPCLK
HiPerClockS
PCLK/nPCLK
PCLK
nPCLK
, 1-
3.3V
3.3V
B
HiPerClockS
PCL K/n PC LK
OUPLE
HiPerClockS
PCLK/nPCLK
TO
UFFER
-18