ICS85411AMLF IDT, Integrated Device Technology Inc, ICS85411AMLF Datasheet - Page 9

• Manufacturer Part Number: ICS85411AMLF
• Description: IC FANOUT BUFF DIFF-LVDS 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS85411AMLF

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Frequency - Max: 650MHz
• Voltage - Supply: 2.97 V ~ 3.63 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 650MHz
• Number Of Outputs: 4
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: 0C to 70C
• Propagation Delay Time: 2.5ns
• Operating Supply Voltage (min): 2.97V
• Mounting: Surface Mount
• Pin Count: 8
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC
• Duty Cycle: 53%
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1184; 800-1184-5; 800-1184; 85411AMLF

D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both signals must meet the V
V
for the HiPerClockS CLK/nCLK input driven by the most common
driver types. The input interfaces suggested here are examples
IDT
F
F
F
CMR
IGURE
IFFERENTIAL
IGURE
IGURE
ICS85411
LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
™
3.3V
input requirements. Figures 2A to 2E show interface examples
/ ICS
R5,R6 locate near the driver pin.
3.3V
LVPECL
2C. H
2A. H
2E. H
™
1.8V
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
LVPECL
R5
100 - 200
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
IDT H
3.3V LVPECL D
I
I
P
I
P
C
P
ER
ER
ER
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
C
Zo = 50 Ohm
Zo = 50 Ohm
C
I
C
P
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
LOCK
ER
I
C
NPUT
S CLK/nCLK I
LOCK
S CLK/nCLK I
S CLK/nCLK I
RIVER
S LVHSTL D
RIVER WITH
I
R1
50
3.3V
R3
125
C1
C2
NTERFACE
R1
84
3.3V
R3
125
R2
50
R4
125
R1
84
R2
84
R4
125
CLK
nCLK
NPUT
R2
84
AC C
NPUT
NPUT
CLK
nCLK
3.3V
3.3V
RIVER
HiPerClockS
Input
HiPerClockS
Input
D
D
D
OUPLE
CLK
nCLK
RIVEN BY
RIVEN BY
RIVEN BY
3.3V
HiPerClockS
Input
PP
and
9
only. Please consult with the vendor of the driver component to
confirm the driver termination requirements. For example in Figure
2A, the input termination applies for IDT HiPerClockS LVHSTL
drivers. If you are using an LVHSTL driver from another vendor,
use their termination recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
2D. H
2B. H
LVDS_Driv er
LVPECL
3.3V LVPECL D
3.3V LVDS D
I
I
P
P
ER
ER
Zo = 50 Ohm
Zo = 50 Ohm
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S CLK/nCLK I
S CLK/nCLK I
ICS85411AM REV. C JANUARY 20, 2009
RIVER
R1
50
RIVER
R3
50
R2
50
R1
100
CLK
nCLK
3.3V
NPUT
NPUT
HiPerClockS
Input
CLK
nCLK
D
D
3.3V
RIVEN BY
RIVEN BY
Receiv er