ICS8302AMILF IDT, Integrated Device Technology Inc, ICS8302AMILF Datasheet
ICS8302AMILF
Specifications of ICS8302AMILF
8302AMILF
ICS8302AMILF
Available stocks
Related parts for ICS8302AMILF
ICS8302AMILF Summary of contents
Page 1
G D ENERAL ESCRIPTION The ICS8302I is a low skew, 1-to-2 LVCMOS Fanout Buffer. The ICS8302I has a single ended clock input. The single ended clock input accepts LVCMOS or LVTTL input levels. The ICS8302I features a pair of LVCMOS ...
Page 2
ABLE IN ESCRIPTIONS ...
Page 3
BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, V -0. Package Thermal Impedance, JA Storage Temperature, T -65°C to 150°C STG T 3A ABLE ...
Page 4
T 3D. LVCMOS / LVTTL DC C ABLE ...
Page 5
P ARAMETER 1.65V± DDO LVCMOS GND -1.65V±5% 3.3V C /3. ORE UTPUT OAD EST PART PART tsk(pp ART ...
Page 6
ABLE VS IR LOW ABLE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains ...
Page 7
ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MS-012 8302AMI LVCMOS / LVTTL F SOIC EAD ACKAGE IMENSIONS ...
Page 8
ABLE RDERING NFORMATION ...
Page 9
...
Page 10
We’ve Got Your Timing Solution. 6024 Silver Creek Valley Road San Jose, CA 95138 © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of ...