ICS651MLF IDT, Integrated Device Technology Inc, ICS651MLF Datasheet - Page 2
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ICS651MLF
Manufacturer Part Number
ICS651MLF
Description
IC CLK BUFFER 1:4 LOW SKEW 8SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Series
ClockBlocks™r
Type
Fanout Buffer (Distribution)r
Datasheet
1.ICS651MLF.pdf
(8 pages)
Specifications of ICS651MLF
Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Input
Clock
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
1.425 V ~ 2.625 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
200MHz
Number Of Outputs
4
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 70C
Propagation Delay Time
5ns
Operating Supply Voltage (min)
1.425V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
1.5/2.5V
Package Type
SOIC N
Input Frequency
200MHz
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
651MLF
800-1087
800-1087-5
800-1087
800-1087
800-1087-5
800-1087
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS651MLF
Manufacturer:
ENPIRION
Quantity:
1 194
Part Number:
ICS651MLF
Manufacturer:
IDT
Quantity:
20 000
Pin Assignment
Pin Descriptions
External Components
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER
Number
ICS651
LOW SKEW 1 TO 4 CLOCK BUFFER
Pin
1
2
3
4
5
6
7
8
A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 F
should be connected between VDD on pin 7 and GND on pin 6, as close to the device as possible. A 33
terminating resistor may be used on each clock output if the trace is longer than 1 inch.
To achieve the low output skew that the ICS651 is capable of, careful attention must be paid to board layout.
Essentially, all four outputs must have identical terminations, identical loads and identical trace geometries. If they
do not, the output skew will be degraded. For example, using a 30 series termination on one output (with 33 on
the others) will cause at least 15 ps of skew.
ICLK
Q1
Q2
Q3
Name
ICLK
GND
VDD
Pin
OE
Q1
Q2
Q3
Q4
4
1
2
3
Output
Output
Output
Output
Power
Power
Type
Input
Input
Pin
Clock Input. 3.3 V tolerant input.
Clock Output 1.
Clock Output 2.
Clock Output 3.
Clock Output 4.
Connect to ground.
Output Enable. Tri-states outputs when low. Connect to VDD for normal operation.
Connect to +1.5 V or +2.5 V.
8
6
5
7
Q4
OE
VDD
GND
2
Pin Description
ICS651
FAN OUT BUFFER
REV G 051310
series