ICS551MLF IDT, Integrated Device Technology Inc, ICS551MLF Datasheet - Page 5
![IC CLK BUFFER 1:4 HS SGL 8-SOIC](/photos/6/50/65086/ics551mlf_sml.jpg)
ICS551MLF
Manufacturer Part Number
ICS551MLF
Description
IC CLK BUFFER 1:4 HS SGL 8-SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Series
ClockBlocks™r
Type
Fanout Buffer (Distribution)r
Datasheet
1.ICS551MLFT.pdf
(9 pages)
Specifications of ICS551MLF
Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Input
CMOS
Output
CMOS
Frequency - Max
160MHz
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
160MHz
Number Of Outputs
4
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Supply Voltage (min)
3V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
3.3/5V
Package Type
SOIC N
Input Frequency
160MHz
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
551MLF
800-1056
800-1056-5
800-1056
800-1056
800-1056-5
800-1056
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS551MLF
Manufacturer:
IDT
Quantity:
804
Part Number:
ICS551MLF
Manufacturer:
IDT
Quantity:
20 000
Company:
Part Number:
ICS551MLFT
Manufacturer:
IDT
Quantity:
1 430
Part Number:
ICS551MLFT
Manufacturer:
IDT
Quantity:
20 000
IDT™ 1 TO 4 CLOCK BUFFER
ICS551
1 TO 4 CLOCK BUFFER
AC Electrical Characteristics
Marking Diagram (ICS551MLF)
VDD = 3.3 V ±10%, Ambient Temperature -40 to +85 C, unless stated otherwise
VDD = 5 V ±10%, Ambient Temperature -40 to +85 C, unless stated otherwise
Notes:
1. With rail to rail input clock.
2. Between any 2 outputs with equal loading.
3. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock
generators.
4. With external series resistor of 33 positioned close to each output pin.
Input Frequency
Output Frequency
Output Clock Rise Time
Output Clock Fall Time
Propagation Delay
Output to Output Skew
Input Frequency
Output Frequency
Output Clock Rise Time
Output Clock Fall Time
Propagation Delay
Output to Output Skew
1
8
Parameter
Parameter
551MLF
######
YYWW
4
5
Symbol
Symbol
Note 1
Note 2
Note 1
Note 2
t
t
t
t
OR
OR
OF
OF
15 pF load, Note 4
0.8 to 2.0 V
2.0 to 0.8 V
135 MHz
Rising edges at VDD/2
15 pF load, Note 4
0.8 to 2.0 V
2.0 to 0.8 V
135 MHz
Rising edges at VDD/2
5
Marking Diagram (ICS551MLN)
Conditions
Conditions
1
8
Min.
Min.
551MLN
######
YYWW
1.5
0
2
0
Typ. Max. Units
Typ. Max. Units
4
4
3
5
ICS551
FAN OUT BUFFER
160
160
250
135
135
250
1.0
1.0
1.0
1.0
8
6
REV P 051310
MHz
MHz
MHz
MHz
ns
ns
ns
ps
ns
ns
ns
ps