STCD1020RDG6F STMicroelectronics, STCD1020RDG6F Datasheet - Page 11

IC CLK DISTRIB 2CH 2.8V 8-TDFN

STCD1020RDG6F

Manufacturer Part Number
STCD1020RDG6F
Description
IC CLK DISTRIB 2CH 2.8V 8-TDFN
Manufacturer
STMicroelectronics
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of STCD1020RDG6F

Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Input
Clock
Output
Clock
Frequency - Max
52MHz
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TDFN
Frequency-max
52MHz
Number Of Outputs
4
Max Input Freq
52 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8361-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STCD1020RDG6F
Manufacturer:
ON
Quantity:
1 000
STCD1020, STCD1030, STCD1040
3
Note:
Device operation
The STCD1020, STCD1030 and STCD1040 are 2, 3 or 4 buffered unity gain clock
distribution circuits. They accept the clock input from an external clock source and send 2, 3
or 4 buffered outputs to different devices.
Each clock output of the STCD1020, STCD1030 and STCD1040 can be enabled for the
device connected to it. If the device connected is in standby and does not require a clock,
the buffer can be disabled to save power consumption. If all the devices connected are in
standby, the STCD1020, STCD1030 and STCD1040 will also be put into standby mode for
further power consumption saving. The enable signals and output clock signals truth table
are given in
The input DC cut capacitor is embedded in STCD1020, STCD1030 and STCD1040. A
capacitor outside is needed for each of the clock outputs. The STCD1020, STCD1030 and
STCD1040 are internally biased at 1/2 V
Table 3.
"0" means logic low and "1" means logic high. When NO CLOCK outputs, the CLKx pins
stay at high impedance.
EN1
...
0
1
1
1
Table
EN2
Truth table for enable signals (EN 1-4) and output clocks (CLK1-4)
...
0
0
1
1
3.
EN3
...
0
0
0
1
Doc ID 13823 Rev 6
EN4
...
0
0
0
1
NO CLOCK
CC
CLOCK
CLOCK
CLOCK
CLK1
DC voltage level at the outputs.
...
NO CLOCK
NO CLOCK
CLOCK
CLOCK
CLK2
...
NO CLOCK
NO CLOCK
NO CLOCK
CLOCK
CLK3
...
Device operation
NO CLOCK
NO CLOCK
NO CLOCK
CLOCK
CLK4
...
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