SI5365-C-GQ Silicon Laboratories Inc, SI5365-C-GQ Datasheet - Page 8

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SI5365-C-GQ

Manufacturer Part Number
SI5365-C-GQ
Description
IC CLOCK MULTIPLIER PROG 100TQFP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI5365-C-GQ

Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5365-C-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
SI5365-C-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
5, 6, 15,
7, 8, 14,
Si5365
99, 100
8
27, 32,
42, 62,
63, 76,
79, 81,
84, 86,
89, 91,
94, 96,
16, 18,
19, 21,
26, 28,
31, 33,
36, 38,
41, 43,
46, 51,
54, 55,
56, 64,
Pin #
65
10
3
4
9
Pin Name
FRQTBL
GND
RST
C1B
C2B
V
DD
GND
V
I/O Signal Level
O
O
DD
I
I
LVCMOS
LVCMOS
LVCMOS
3-Level
Table 3. Si5365 Pin Descriptions (Continued)
Supply
Supply
External Reset.
Active low input that performs external hardware reset of device. Resets
all internal logic to a known state and forces the device registers to their
default value. Clock outputs are tristated during reset. After rising edge of
RST signal, the device will perform an internal self-calibration.
This pin has a weak pullup.
Frequency Table Select.
This pin selects SONET/SDH, datacom, or SONET/SDH to datacom fre-
quency translation table.
L = SONET/SDH.
M = Datacom.
H = SONET/SDH to Datacom.
This pin has a weak pullup and weak pulldown and defaults to M.
Some designs may require an external resistor voltage divider when
driven by an active device that will tri-state.
V
The device operates from a 1.8 or 2.5 V supply. Bypass capacitors should
be associated with the following V
Pins
5, 6
15
27
62, 63
76, 79
81, 84
86, 89
91, 94
96, 99, 100
Ground.
These pins must be connected to system ground. Minimize the ground
path impedance for optimal performance.
CKIN1 Invalid Indicator.
This pin is an active high alarm output associated with CKIN1. Once trig-
gered, the alarm will remain high until CKIN1 is validated.
0 = No alarm on CKIN1.
1 = Alarm on CKIN1.
CKIN2 Invalid Indicator.
This pin is an active high alarm output associated with CKIN2. Once trig-
gered, the alarm will remain high until CKIN2 is validated.
0 = No alarm on CKIN2.
1 = Alarm on CKIN2.
DD
.
Preliminary Rev. 0.4
Bypass Cap
0.1 µF
0.1 µF
0.1 µF
0.1 µF
1.0 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
Description
DD
pins:

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