ICS87604AGILFT IDT, Integrated Device Technology Inc, ICS87604AGILFT Datasheet - Page 7

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ICS87604AGILFT

Manufacturer Part Number
ICS87604AGILFT
Description
IC CLK GEN PCI/PCI-X 28-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Clock Multiplier, Zero Delay Bufferr
Datasheet

Specifications of ICS87604AGILFT

Input
LVCMOS, LVTTL
Output
LVCMOS, LVTTL
Frequency - Max
167MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Frequency-max
167MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
87604AGILFT
ICS87604I
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. To achieve optimum jitter per-
formance, power supply isolation is required. The ICS87604I pro-
vides separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
should be individually connected to the power supply
plane through vias, and 0.01μF bypass capacitors should be
used for each pin. Figure 1 illustrates this for a generic V
and also shows that V
along with a 10µF bypass capacitor be connected to the V
The 10
R
I
C
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating. Though
not required, but for additional protection, a 1k
tied from XTAL_IN to ground.
REF_CLK I
For applications not requiring the use of the reference clock, it
can be left floating. Though not required, but for additional
protection, a 1k
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
C
The ICS87604I has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the frequency ppm
error. The optimum C1 and C2 values can be slightly adjusted for
optimum frequency accuracy.
ICS87601AGI REVISION B APRIL 1, 2010
P
NPUTS
RYSTAL
ECOMMENDATIONS FOR
RYSTAL
OWER
:
I
NPUT
S
resistor can also be replaced by a ferrite bead.
I
UPPLY
NPUT
NPUT
ONTROL
I
resistor can be used.
NTERFACE
F
P
resistor can be tied from the REF_CLK to
INS
ILTERING
DDA
requires that an additional10
U
NUSED
T
ECHNIQUES
I
NPUT AND
A
DD
PPLICATION
, V
resistor can be
O
DDA
UTPUT
, and V
resistor
DDA
DD
P
pin.
pin
DDO
INS
7
LOW VOLTAGE/LOW SKEW, 1:4 PCI/PCI-X ZERO DELAY CLOCK GENERATOR
I
NFORMATION
O
LVCMOS O
All unused LVCMOS output can be left floating. There should be
no trace attached.
UTPUTS
18pF Parallel Crystal
:
UTPUTS
F
IGURE
F
V
V
IGURE
DDA
DD
X1
1. P
2. C
.01 F
.01 F
OWER
RYSTAL
3.3V
S
10
2010 Integrated Device Technology, Inc.
10 F
UPPLY
I
NPU
C1
22p
C2
22p
t I
F
NTERFACE
ILTERING
XTAL_IN
XTAL_OUT

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