ICS9248AG-192 IDT, Integrated Device Technology Inc, ICS9248AG-192 Datasheet - Page 8

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ICS9248AG-192

Manufacturer Part Number
ICS9248AG-192
Description
IC FREQ TIMING GENERATOR 28TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS9248AG-192

Input
Crystal
Output
Clock
Frequency - Max
66MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Frequency-max
66MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
9248AG-192

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS9248AG-192
Manufacturer:
ICS
Quantity:
55
ICS9248-192
0540F—10/27/05
The power down selection is used to put the part into a very low power state without turning off the power to the part.
PD# is an asynchronous active low input. This signal is synchronized internally by the ICS9248-192 prior to its control
action of powering down the clock synthesizer. Internal clocks will not be running after the device is put in power down
state. When PD# is active (low) all clocks are driven to a low state and held prior to turning off the VCOs and the crystal
oscillator. The power on latency is guaranteed to be less than 3ms. The power down latency is less than three CPUCLK
cycles. PCI_STOP# and CPU_STOP# are don’t care signals during the power down operations.
PD# Timing Diagram
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248 device).
2. PD# is an asynchronous input and metastable conditions may exist. This signal is synchronized inside the ICS9248.
3. The shaded sections on the VCO and the Crystal signals indicate an active clock is being generated.
PCICLK_F, PCICLK
CRYSTAL OSC.
INTERNAL
INTERNAL
(Internal)
(Internal)
CPUCLK
PD#
CPUCLK
PCICLK
VCOs
REF
8

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