ICS950908BGLFT IDT, Integrated Device Technology Inc, ICS950908BGLFT Datasheet - Page 3

no-image

ICS950908BGLFT

Manufacturer Part Number
ICS950908BGLFT
Description
IC TIMING CTRL HUB P4 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS950908BGLFT

Input
Crystal
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
950908BGLFT
Pin Description
Pin description continued on next page.
0653A—07/26/04
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
~ This output has 2X drive strength
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
#
1
2
3
4
5
6
7
8
9
**SEL_SDR/DDR#/PCICLK1
*(PCI_STOP#)AGPCLK2
*(CLK_STOP#)/PCICLK6
Integrated
Circuit
Systems, Inc.
*SEL_408/K7/AGPCLK1
*MULTSEL/PCICLK2
*MODE/AGPCLK0
**FS1/PCICLK_F
*FS2/24_48MHz
*(PD#)RESET#
*FS3/48MHz
*FS0/REF0
GNDAGP
VDDAGP
PCICLK3
PCICLK4
PCICLK5
GNDPCI
AVDD48
VDDPCI
GND48
SDATA
NAME
SCLK
GND
GND
IREF
VDD
PIN
X1
X2
TYPE
PWR
OUT
PWR
PWR
PWR
OUT
OUT
PWR
OUT
PWR
PWR
PWR
PWR
OUT
PIN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
IN
Frequency select latch input pin / 14.318 MHz reference clock.
Ground pin.
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Power supply for AGP clocks, nominal 3.3V
Function select latch input pin, 1=Desktop Mode, 0=Mobile Mode / AGP clock output.
CPU output type select latch input pin 0= K7, 1= CK408 / AGP clock output.
Stops all PCICLKs besides the PCICLK_F clocks at logic 0 level, when input low. This
input is activated by the MODE selection pin / AGP clock output.
Ground pin for the AGP outputs
Frequency select latch input pin / 3.3V PCI free running clock output.
Memory type select latch input pin 0= DDR, 1= PC133 SDRAM / 3.3V PCI clock output.
3.3V LVTTL input for selection the current multiplier for CPU outputs / 3.3V PCI clock
output.
Ground pin for the PCI outputs
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
PCI clock output.
Stops all CPU, DDR/SDRAM and FB_OUT clocks at logic 0 level, when input low. This
input is activated by the MODE selection pin / PCI clock output.
Ground pin for the 48MHz outputs
Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
Frequency select latch input pin / Fixed 24 or 48MHz clock output. 3.3V.
Analog power for 48MHz outputs and fixed PLL core, nominal 3.3V
Power supply, nominal 3.3V
Ground pin.
This pin establishes the reference current for the differential current-mode output pairs.
This pin requires a fixed precision resistor tied to ground in order to establish the
appropriate current. 475 ohms is the standard value.
Asynchronous active low input pin used to power down the device into a low power
state. This input is activated by the MODE selection pin / Real time system reset
signal for frequency gear ratio change or watchdog timer timeout. This signal is active
low.
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
3
Preliminary Product Preview
DESCRIPTION
ICS950908

Related parts for ICS950908BGLFT