VF2510BGILF IDT, Integrated Device Technology Inc, VF2510BGILF Datasheet - Page 2

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VF2510BGILF

Manufacturer Part Number
VF2510BGILF
Description
IC PLL CLK DRIVER 3.3V 24-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Driverr
Datasheet

Specifications of VF2510BGILF

Input
Clock
Output
Clock
Frequency - Max
200MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Frequency-max
200MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ICSVF2510
Pin Descriptions
Note:
1. Weak pull-ups on these inputs
Functionality
0722B—05/06/04
Test mode:
When AVCC is 0, shuts off the PLL
and connects the input directly to the output buffers
6, 7, 18, 19
2, 10, 14
OE
PIN #
0
1
0
1
11
12
13
15
16
17
20
21
22
23
24
1
3
4
5
8
9
INPUTS
AGND
VCC
CLK0
CLK1
CLK2
GND
CLK3
CLK4
OE
FBOUT
FBIN
CLK5
CLK6
CLK7
CLK8
CLK9
VCC
AVCC
CLKIN
AVCC
3.33
3.33
PIN NAME
1
0
0
CLK (9:0)
Driven
Driven
Buffer Mode
0
0
TYPE
PWR
PWR
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
OUTPUTS
FBOUT
Analog Ground
Power Supply (3.3V)
Buffered clock output.
Buffered clock output.
Buffered clock output.
Ground
Buffered clock output.
Buffered clock output.
Output enable (has internal pull_up). When high, normal operation.
When low, clock outputs are disabled to a logic low state.
Feedback output
Feedback input
Buffered clock output.
Buffered clock output.
Buffered clock output.
Buffered clock output.
Buffered clock output.
Power Supply (3.3V) digital supply.
Analog power supply (3.3V). When input is ground PLL is off and
bypassed.
Clock input
Driven
Driven
Driven
Driven
Source
CLKIN
CLKIN
PLL
PLL
2
Shutdown
PLL
DESCRIPTION
N
N
Y
Y

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