ICS951901AFLFT IDT, Integrated Device Technology Inc, ICS951901AFLFT Datasheet - Page 18

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ICS951901AFLFT

Manufacturer Part Number
ICS951901AFLFT
Description
IC FREQ GENERATOR/BUFFER 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS951901AFLFT

Input
Crystal
Output
Clock
Frequency - Max
150MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Frequency-max
150MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
951901AFLFT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ICS951901AFLFT
Manufacturer:
IDT
Quantity:
10 185
ICS951901
0670B—07/15/04
PD# Timing Diagram
The power down selection is used to put the part into a very low power state without turning off the power to the part.
PD# is an asynchronous active low input. This signal needs to be synchronized internal to the device prior to powering
down the clock synthesizer.
Internal clocks are not running after the device is put in power down. When PD# is active low all clocks need to be driven
to a low value and held prior to turning off the VCOs and crystal. The power up latency needs to be less than 3 mS.
The power down latency should be as short as possible but conforming to the sequence requirements shown below.
PCI_STOP# and CPU_STOP# are considered to be don't cares during the power down operations. The REF and 48MHz
clocks are expected to be stopped in the LOW state as soon as possible. Due to the state of the internal logic, stopping
and holding the REF clock outputs in the LOW state may require more than one clock cycle to complete.
Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS94209 device).
2. As shown, the outputs Stop Low on the next falling edge after PD# goes low.
3. PD# is an asynchronous input and metastable conditions may exist. This signal is synchronized inside this part.
4. The shaded sections on the VCO and the Crystal signals indicate an active clock.
5. Diagrams shown with respect to 133MHz. Similar operation when CPU is 100MHz.
18

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