IDTCV126PVG IDT, Integrated Device Technology Inc, IDTCV126PVG Datasheet - Page 2

• Manufacturer Part Number: IDTCV126PVG
• Description: IC FLEXPC CLK PROGR P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV126PVG

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV126PVG

PIN CONFIGURATION
CPU AND SRC SPREAD SPECTRUM
MAGNITUDE CONTROL
IDTCV126
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
V
V
DD_
SS_
V
V
V
V
V
V
V
V
DD
SS
DD
DD
DD
DD
48MHz
SRC0#
SRC1#
SRC2#
SRC3#
SRC4#
SS
SS
48MHz
48MHz
PCIF0
PCIF1
PCIF2
_SRC
_SRC
_SRC
SRC0
SRC1
SRC2
SRC3
SRC4
_
SMC[2:0]
_PCI
_PCI
_PCI
_PCI
PCI0
PCI1
PCI2
PCI3
SRC
000
001
010
011
100
101
110
111
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
SSOP/ TSSOP
TOP VIEW
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
FSC/TEST_SEL
REF0
REF1
V
XTAL_IN
XTAL_OUT
V
FSB/TEST_MODE
FSA
V
CPU0
CPU0#
V
CPU1
CPU1#
V
CPU2
CPU2#
V
CPU3
CPU3#
V
V
IREF
NC
V
SDA
SCL
DD
SS
DD
DD
SS
DD
DDA
SSA
TT
±0.125
±0.375
±0.25
- 0.25
- 0.75
±0.5
- 0.5
_REF
_REF
_CPU
_CPU
_CPU
_CPU
_P
- 1
%
WRGD
#/
P
WRDWN
2
ABSOLUTE MAXIMUM RATINGS
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
PIN DESCRIPTION
Symbol
V
V
T
T
T
ESD Prot
36,37,39
40,42,43
STG
AMBIENT
CASE
54, 55
45, 46
16-19,
21-24,
26, 27
DDA
DDIN
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Pin#
9-11
3-6
52
51
13
49
56
48
33
31
30
29
FSB/TEST_MODE
FSC/TEST_SEL
V
TT
3.3V Core Supply Voltage
3.3V Logic Input Supply Voltage GND - 0.5
Storage Temperature
Ambient Operating Temperature
Case Temperature
Input ESD Protection
Human Body Model
XTAL_OUT
CPU#[3:0]
SRC#[4:0]
Pin Name
PCIF[2:0]
CPU[3:0]
SRC[4:0]
_P
XTAL_IN
REF[1:0]
PCI[3:0]
USB48
IREF
FSA
SDA
SCL
WRGD
Description
#/PD
COMMERCIAL TEMPERATURE RANGE
Type
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Frequency select. Select test mode if
14.318 XTAL input
14.318 XTAL output
14.318 MHz
33.33MHz PCI clock
33.33MHz PCI free running clock
48MHz
CPU differential clock
SRC differential clock
Frequency select. When in test mode, 0
= clock Hi-Z, 1 = clk REF/N
pulled to 2V and above when
V
Frequency select, sampled on
V
Reference current for differential outputs
3.3V LVTTL input, a level-sensitive
strobe used to latch the FS_A, FS_B,
FS_C/TEST_SEL inputs. After
V
time input for asserting power down
(active HIGH).
SMBus data
SMBus clock
TT
TT
TT
_P
_P
_P
Description
WRGD
WRGD
WRGD
2000
Min
–65
0
# assertion, becomes a real-
# assertion.
# assertion.
+150
+115
Max
+70
4.6
4.6
(1)
Unit
°C
°C
°C
V
V
V