ICS93V855AGLF IDT, Integrated Device Technology Inc, ICS93V855AGLF Datasheet - Page 5

• Manufacturer Part Number: ICS93V855AGLF
• Description: IC DDR PLL CLOCK DRIVER 28-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Driverr

Specifications of ICS93V855AGLF

• Input: Clock
• Output: Clock
• Frequency - Max: 233MHz
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Frequency-max: 233MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 93V855AGLF

Notes:
0497B—06/01/04
Switching Characteristics
T
Max clock frequency
Application Frequency
Range
Input clock duty cycle
Input clock slew rate
CLK stabilization
Low-to high level propagation
delay time
High-to low level propagation
delay time
Output enable time
Output disable time
Period jitter
Half-period jitter
Output clock slew rate
Cycle to Cycle Jitter
Phase error
Output to Output Skew
Rise Time, Fall Time
A
= 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
4. Does not include jitter.
1.
2.
3.
3
Refers to transition on noninverting output in PLL bypass mode.
While the pulse skew is almost constant over frequency, the duty cycle error
increases at higher frequencies. This is due to the formula: duty cycle=twH/tc,
were the cycle (tc) decreases as the frequency goes up.
Switching characteristics are guaranteed for application frequency range. The PLL
Locks over the Max Clock Frequency range, but the device doe not necessarily
meet other timing parameters.
PARAMETER
4
3
SYMBOL
t
(phase error)
freq
t
freq
t
T
t
cyc
t
t
jit(hper)
jit (per)
t
t
t
PLH
PHL
d
t
skew
STAB
t
t
sl(o)
r
sl(I)
dis
en
, t
-t
tin
App
op
cyc
1
1
f
CLK_IN to any output
CLK_IN to any output
PD# to any output
PD# to any output
Load = 120 /16pF
Over the application
frequency range
CONDITION
5
-100
MIN
650
-75
-75
-50
33
60
40
1
1
TYP
800
5.5
5.5
40
5
5
ICS93V855
MAX
233
170
100
100
950
60
75
75
50
60
2
2
UNITS
MHz
MHz
v/ns
v/ns
µs
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
%