IDTCV115-4PVG8 IDT, Integrated Device Technology Inc, IDTCV115-4PVG8 Datasheet - Page 3

• Manufacturer Part Number: IDTCV115-4PVG8
• Description: IC FLEXPC CLK PROGR P4 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: FlexPC™r
• Type: PC Clockr

Specifications of IDTCV115-4PVG8

• Input: Crystal
• Output: Clock
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: CV115-4PVG8

PIN DESCRIPTION
IDTCV115-4
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Pin Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
1
2
3
4
5
6
7
8
9
CPUC2_ITP/ SRCC7
V
CPUT2_ITP/ SRCT7
TT
PCIF0/ITP_EN
SRCC4_SATA
SRCT4_SATA
_P
FS_B/USB48
PCI4/Turbo1
V
V
V
V
V
V
V
V
V
WRGD
SRCC0
SRCC1
SRCC2
SRCC3
SRCC5
SRCC6
CPUC1
CPUC0
CPUT1
CPUT0
V
SRCT0
SRCT1
SRCT2
SRCT3
SRCT5
SRCT6
DD
V
DD
DD
DD
Reset#
PCIF1
PCIF2
SS
DD
DD
Turbo2
Name
SS
SS
PCI2
PCI3
IREF
SDA
DD
SS
V
V
V
_SRC
_SRC
_SRC
_SRC
_CPU
_PCI
_PCI
_PCI
_PCI
SS
SS
SS
_48
_48
/P
WRDWN
#
Type
PWR
GND
GND
PWR
PWR
GND
PWR
GND
GND
PWR
GND
PWR
GND
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
I/O
I/O
I/0
IN
3.3V
GND
PCI clock
PCI clock
PCI clock output or Turbo input. Byte 30, bit 3 mode selection. Byte 30, bit 3 = 1, PCI clock. Byte
30, bit 3 = 0 Turbo mode. In Turbo mode, 1 = load TCN and TPN into CPU and SRC PLL.
GND
3.3V
PCI clock, free running. CPU_2 select (sampled at V
PCI clock,
PCI clock,
3.3V
CPU Frequency selection. 48MHz afterward.
GND
Differential Serial reference clock
Differential Serial reference clock
3.3V LVTTL input is a level-sensitive strobe used to latch the FS_A, FS_B, FS_C/TEST_SEL and
PCIF_0/ITP_EN inputs. After V
asserting power down (active LOW). Internal pull HIGH.
Differential Serial reference clock
Differential Serial reference clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
GND
SATA clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
3.3V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ V
Load TCN2 into CPU PLL. Byte 26, bit 7 enable control. Disabled at power on.
Reference current for differential output buffer
GND
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
3.3V
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
SMBus data
SATA clock
Reset output
3
TT
_P
WRGD
assertion, active HIGH, becomes a real-time input for
Description
COMMERCIAL TEMPERATURE RANGE
TT
_P
WRGD
assertion), HIGH = CPU_2.
TT
TT
_P
_P
WRGD
WRGD
assertion = SRC_7
assertion = SRC_7