ICS9EPRS525AGLF IDT, Integrated Device Technology Inc, ICS9EPRS525AGLF Datasheet - Page 5

• Manufacturer Part Number: ICS9EPRS525AGLF
• Description: IC EMBEDDED PC MAIN CLK 56TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of ICS9EPRS525AGLF

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1945

IDT
1
2
3
Absolute Maximum Ratings - DC Parameters
Electrical Characteristics - Input/Supply/Common Output DC Parameters
Guaranteed by design and characterization, not 100% tested in production.
Operation under these conditions is neither implied, nor guaranteed.
Maximum input voltage is not to exceed VDD
Low Threshold Input- FSA,FSB = '1'
Low Threshold Input- High Voltage
ICS9EPRS525
56-pin CK505 for Embedded Systems
Current sinking at V
Low Threshold Input-Low Voltage
TM
Low Threshold Input- FSC = '1'
Spread Spectrum Modulation
Maximum SMBus Operating
56-pin CK505 for Embedded Intel Systems
Ambient Operating Temp
Operating Supply Current
Low-level Output Voltage
Maximum Supply Voltage
Maximum Supply Voltage
Maximum Input Voltage
Input Leakage Current
Input Leakage Current
Clock/Data Rise Time
Minimum Input Voltage
Clock/Data Fall Time
Output High Voltage
Output Low Voltage
iAMT Mode Current
Storage Temperature
Input ESD protection
Powerdown Current
Input High Voltage
Input Capacitance
Input Low Voltage
PCI3/CFG0 Input
PCI3/CFG0 Input
PCI3/CFG0 Input
Input Frequency
Clk Stabilization
Supply Voltage
Supply Voltage
Pin Inductance
SMBus Voltage
Tdrive_CR_off
PARAMETER
Tdrive_CR_on
SCLK/SDATA
SCLK/SDATA
Tdrive_CPU
PARAMETER
Frequency
Frequency
Trise_SE
Tfall_SE
Voltage
Voltage
OLSMB
= 0.4 V
VDDxxx_IO
V
V
SYMBOL
V
V
Tambient
V
VDDxxx
V
I
T
I
IH_FS_TEST
IH_FS_FSAB
I
T
DDiAMT3.3
I
IH_FS_FSC
IL_CFGMID
I
DDiAMTIO
I
T
V
F
IL_CFGLO
DDOP3.3
I
f
V
V
V
DDPD3.3
DRCROFF
V
IL_CFGHI
I
DDOPIO
DDPDIO
T
V
DRCRON
T
T
PULLUP
SSMOD
C
C
T
T
VDDxxx_IO
INRES
DRSRC
SMBUS
V
OLSMB
L
C
IL_FS
OHSE
OLSE
STAB
IHSE
I
FALL
RISE
SYMBOL
ILSE
F
RI2C
FI2C
OUT
ESD prot
INX
IN
pin
DD
VDDxxx
IN
i
V
V
Ts
IH
IL
Fall/rise time of all 3.3V control inputs from 20-80%
From VDD Power-Up or de-assertion of PD to 1st
Inputs with pull up or pull down resistors
Full Active, C
Low-Voltage Differential I/O Supply
Full Active, C
Single-ended outputs, I
Single-ended outputs, I
Output stop after CR deasserted
Power down mode, 3.3V Rail
Output run after CR asserted
Power down mode, IO Rail
PCI_STOP# de-assertion
Optional input, 2.75V typ.
Optional input, 1.65V typ.
Optional input, 0.55V typ.
Single-ended 3.3V inputs
Single-ended 3.3V inputs
CPU output enable after
Low-Voltage Differential I/O Supply
Output pin capacitance
V
V
Triangular Modulation
M1 mode, 3.3V Rail
(Min VIH + 0.15) to
(Max VIL - 0.15) to
IN
IN
M1 Mode, IO Rail
(Min VIH + 0.15)
(Max VIL - 0.15)
Supply Voltage
CONDITIONS
SMB Data Pin
= V
= V
X1 & X2 pins
Logic Inputs
3.3 V +/-5%
3.3 V +/-5%
3.3 V +/-5%
3.3 V +/-5%
V
@ I
DD
L
L
DD ,
DD ,
Human Body Model
clock
= Full load; Idd 3.3V
= Full load; IDD IO
= 3.3 V
5
PULLUP
Supply Voltage
-
CONDITIONS
V
V
3.3V Inputs
IN
IN
Any Input
= GND
= GND
OH
OL
-
= -1mA
= 1 mA
V
V
V
0.9975
3.135
SS
SS
SS
MIN
-200
2.4
0.7
0.7
1.3
1.5
2.4
2.7
30
-5
0
2
2
4
- 0.3
- 0.3
- 0.3
GND - 0.5
VDD + 0.3
V
VDD+0.3
VDD+0.3
2000
MIN
DD
-65
3.465
3.465
MAX
1000
0.35
200
115
400
300
100
0.8
1.5
0.9
0.1
1.8
0.4
5.5
0.4
70
55
36
10
15
10
10
10
33
+ 0.3
2
5
5
7
5
6
6
0
UNITS Notes
MHz
kHz
kHz
mA
mA
mA
mA
mA
mA
ms
mA
uA
uA
nH
°C
pF
pF
pF
ns
us
ns
ns
ns
ns
ns
MAX
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
150
4.6
3.8
4.6
9, 10
9, 10
9, 10
10
10
10
1614B—01/21/10
3
3
8
8
2
1
1
UNITS Notes
°
V
V
V
V
V
C
4,5,7
4,7
4,7
6,7
7
7