ICS9FG104DFILFT IDT, Integrated Device Technology Inc, ICS9FG104DFILFT Datasheet - Page 7

IC FREQ TIMING GENERATOR 28-SSOP

ICS9FG104DFILFT

Manufacturer Part Number
ICS9FG104DFILFT
Description
IC FREQ TIMING GENERATOR 28-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS9FG104DFILFT

Input
Clock, Crystal
Output
Differential
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1253-2
9FG104DFILFT
IDT
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
ICS9FG104D
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
®
Byte N + X -1
Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA
WR
P
T
Beginning Byte N
Data Byte Count = X
Index Block Write Operation
Slave Address DC
Beginning Byte = N
Byte N + X - 1
Controller (Host)
General SMBus serial interface information for the ICS9FG104D
starT bit
stoP bit
WRite
(h)
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(H)
7
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address DC
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address DD
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RD
RT
N
P
T
Index Block Read Operation
Slave Address DC
Beginning Byte = N
Slave Address DD
Controller (Host)
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(h)
(h)
.
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
1541C—12/16/10
(h)
(h)
(h)

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