PIC24FV16KA301-I/P Microchip Technology, PIC24FV16KA301-I/P Datasheet - Page 83

• Manufacturer Part Number: PIC24FV16KA301-I/P
• Description: MCU 16KB FLASH 2KB RAM 20-PDIP
• Manufacturer: Microchip Technology

Specifications of PIC24FV16KA301-I/P

• Controller Family/series: PIC24F
• Core Size: 16bit
• No. Of I/o's: 17
• Program Memory Size: 16KB
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 32MHz
• Oscillator Type: External, Internal
• Rohs Compliant: Yes
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 8-1:
 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 7-5
Note 1:
R/W-0, HSC R/W-0, HSC R/W-0, HSC
Note:
IPL2
U-0
—
2:
3:
(2,3)
See
The IPL bits are concatenated with the IPL3 bit (CORCON<3>) to form the CPU interrupt priority level.
The value in parentheses indicates the interrupt priority level if IPL3 = 1.
The IPL Status bits are read-only when NSTDIS (INTCON1<15>) = 1.
Bit 8 and bits 4 through 0 are described in
Unimplemented: Read as ‘0’
IPL<2:0>: CPU Interrupt Priority Level Status bits
111 = CPU interrupt priority level is 7 (15); user interrupts disabled
110 = CPU interrupt priority level is 6 (14)
101 = CPU interrupt priority level is 5 (13)
100 = CPU interrupt priority level is 4 (12)
011 = CPU interrupt priority level is 3 (11)
010 = CPU interrupt priority level is 2 (10)
001 = CPU interrupt priority level is 1 (9)
000 = CPU interrupt priority level is 0 (8)
Register 3-1
IPL1
U-0
—
(2,3)
SR: ALU STATUS REGISTER
for the description of these bits, which are not dedicated to interrupt control functions.
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
IPL0
U-0
—
(2,3)
R-0, HSC
RA
PIC24FV32KA304 FAMILY
U-0
—
(1)
Section 3.0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC
U-0
N
(2,3)
—
(1)
“CPU”.
OV
U-0
—
(1)
x = Bit is unknown
U-0
Z
—
(1)
DS39995B-page 83
R-0, HSC
DC
C
(1)
(1)
bit 8
bit 0