PIC24FV16KA301-I/P Microchip Technology, PIC24FV16KA301-I/P Datasheet - Page 215

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PIC24FV16KA301-I/P

Manufacturer Part Number
PIC24FV16KA301-I/P
Description
MCU 16KB FLASH 2KB RAM 20-PDIP
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC24FV16KA301-I/P

Controller Family/series
PIC24F
Core Size
16bit
No. Of I/o's
17
Program Memory Size
16KB
Eeprom Memory Size
512Byte
Ram Memory Size
2KB
Cpu Speed
32MHz
Oscillator Type
External, Internal
Rohs Compliant
Yes
Processor Series
PIC24FV
Core
PIC
Data Bus Width
16 bit
Program Memory Type
Flash
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-20
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 22-1:
 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
C = Clearable bit
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-11
bit 10
bit 9-8
bit 7-4
bit 3
bit 2
bit 1
bit 0
SSRC3
ADON
R/W-0
R/W-0
ADON: A/D Operating Mode bit
1 = A/D Converter module is operating
0 = A/D Converter is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
Reserved: Maintain as ‘1’
FORM<1:0>: Data Output Format bits (see formats following)
11 = Fractional result, signed, left-justified
10 = Absolute fractional result, unsigned, left-justified
01 = Decimal result, signed, right-justified
00 = Absolute decimal result, unsigned, right-justified
SSRC<3:0>: Sample Clock Source Select bits
1111 = Not available; do not use


1000 = Not available; do not use
0111 = Internal counter ends sampling and starts conversion (auto-convert)
0110 = Not Available; do not use
0101 = Timer1 event ends sampling and starts conversion
0100 = CTMU event ends sampling and starts conversion
0011 = Timer5 event ends sampling and starts conversion
0010 = Timer3 event ends sampling and starts conversion
0001 = INT0 event ends sampling and starts conversion
0000 = Clearing the SAMP bit in software ends sampling and begins conversion
Unimplemented: Read as ‘0’
ASAM: A/D Sample Auto-Start bit
1 = Sampling begins immediately after last conversion; SAMP bit is auto-set
0 = Sampling begins when SAMP bit is manually set
SAMP: A/D Sample Enable bit
1 = A/D Sample-and-Hold amplifiers are sampling
0 = A/D Sample-and-Hold are holding
DONE: A/D Conversion Status bit
1 = A/D conversion cycle is completed
0 = A/D conversion cycle is not started or in progress
SSRC2
R/W-0
U-0
AD1CON1: A/D CONTROL REGISTER 1
U = Unimplemented bit, read as ‘0’
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
ADSIDL
SSRC1
R/W-0
R/W-0
SSRC0
R/W-0
U-0
PIC24FV32KA304 FAMILY
HSC = Hardware Settable/Clearable bit
‘0’ = Bit is cleared
U-0
U-0
R/W-0
ASAM
r-0
x = Bit is unknown
R/W-0 HSC
FORM1
R/W-0
SAMP
DS39995B-page 215
R/C-0 HSC
FORM0
DONE
R/W-0
bit 8
bit 0

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