CYNSE10512A-133FGC Cypress Semiconductor Corp, CYNSE10512A-133FGC Datasheet - Page 39

• Manufacturer Part Number: CYNSE10512A-133FGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE10512A-133FGC

• Operating Supply Voltage (typ): 1.2V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02110 Rev. *B
5.4.16
The BPAR is only accessible when the device is in the Enhanced mode. There is one BPAR for each block in the device. Table 5-
21 shows the BPR fields.
Table 5-21. Block Parity Register Description
5.4.17
The BNFA is only accessible when the device is in the Enhanced mode. There is one BNFA for each block in the device. Table 5-
22 shows the BNFA fields.
Table 5-22. Block NFA Register Description
MULTI3
MULTI2
PERR
Field
NFA3
NFA2
NFA1
Field
EN
F3
F2
71
Block Parity Register (BPAR)
Block NFA Register (BNFA)
71
(decimal)
(decimal)
Range
[71:32]
[30:4]
[3:0]
Range
[24:16]
[29:25]
[40:32]
[31]
[13:9]
[8:0]
[14]
[15]
[30]
[31]
63
63
Initial Value
Initial Value
(binary)
(binary)
0000
0
0
1
0
0
1
0
0
55
55
Parity Error. This field contains the status of a Parity operation. It is set to 1 when any parity
error is detected during the Parity operation on the associated block. Each bit corresponds
to one of the four x72 entries checked during the Parity operation. Bit[0] corresponds to the
lowest address. This field is sticky, i.e., it can only be cleared by a user write to the register.
This field contains only this block’s status. To clear this bit, the user must write a “1” to this
bit location. Writing a “0” will preserve the old value.
Reserved.
Enable Parity Checking. This field enables parity checking for the associated block. When
set to 1, the associated block will participate in Parity operation.
Reserved.
NFA0
Next-free Address for Sub-block #3. This field contains the address/index of the next-
free entry within the sub-block of the block associated with this register. If the entry size is
larger than x72, the least significant bits will be set to 0 as follows:
x144: NFAx[0] = ‘0’,
x288: NFAx[1:0] = “00”,
x576: NFAx[2:0] = “000”.
Reserved.
Multiple Free Entries in Sub-block #3. This field contains the multiple free entry status.
If there are multiple free entries in the sub-block, this bit is set to 1.
Free Entry in Sub-block #3. This field indicates the sub-block full status. If this field is set
to 1, the sub-block is full and there are no free entries. If the field is set to 0, the sub-block
is not full and there is a free entry.
Next-free Address for Sub-block #2. See NFA3 description.
Reserved.
Multi Free Entry in Sub-block #2. See MULTI3 description.
Free Entry in Sub-block #2. See F3 description.
Next-free Address for Sub-block #1. See NFA3 description.
CONFIDENTIAL
47
Figure 5-24. Block Parity Register
47
Figure 5-25. Block NFA Register
39
39
NFA1
31
31
Description
Description
23
23
NFA2
15
15
CYNSE10512A
CYNSE10256A
CYNSE10128A
7
7
NFA3
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