TSX5070FN STMicroelectronics, TSX5070FN Datasheet - Page 13

• Manufacturer Part Number: TSX5070FN
• Manufacturer: STMicroelectronics
• Type: PCMr

Specifications of TSX5070FN

• Number Of Channels: 1
• Gain Control: Programmable
• Number Of Adc's: 1
• Number Of Dac's: 1
• Package Type: PLCC
• Operating Supply Voltage (typ): ±5V
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 1
• Operating Supply Voltage (max): ±5.25V
• Operating Supply Voltage (min): ±4.75V
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Figure 1 shows a simplified diagram of the local
echo path for a typical application with a trans-
former interface. The magnitude and phase of the
local echo signal, measured at VF
of the termination impedance Z
Figure 1: Simplified Diagram of Hybrid Balance Circuit
PROGRAMMING THE FILTER
On initial power-up the Hybrid Balance filter is dis-
abled. Before the hybrid balance filter can be pro-
grammed it is necessary to design the transformer
and termination impedance in order to meet system
2 W input return loss specifications, which are nor-
mally measured against a fixed test impedance
(600 or 900
echo path be modeled and the hybrid balance filter
programmed. Hybrid balancing is also measured
against a fixed test impedance, specified by each
national Telecom administration to provide ade-
quate control of talker and listener echo over the
majority of their network connections. This test im-
pedance is Z
degree of transhybrid loss obtained by the pro-
grammable filter must be measured from the PCM
digital input D
either by digital test signal analysis or by conversion
back to analog by a PCM CODEC/Filter.
Three registers must be programmed in COMBO
IIG to fully configure the Hybrid Balance Filter as
follows :
Register 1: select/de-select Hybrid Balance Filter;
invert/non-invert cancellation signal;
select/de-select Hybal2 filter section;
attenuator setting.
L
in most countries). Only then can the
R
in figure 1. The echo signal and the
0, to the PCM digital output D
T
X
, the line trans-
I, are a function
X
0,
former and the impedance of the 2 W loop, Z
impedance reflected back into the transformer pri-
mary is expressed as Z
fer function from VF
Register 2: select/de-select Hybal1 filter;
Table 10: Hybrid Balance Register 2 Byte 2 in-
structions
Register 3 : program pole frequency in Hybal2 filter;
Standard filter design techniques may be used to
model the echo path (see equation (1)) and design
a matching hybrid balance filter configuration. Alter-
natively, the frequency response of the echo path
can be measured and the hybrid balance filter pro-
grammed to replicate it.
An Hybrid Balance filter design guide and soft-
ware optimization program are available under li-
cense from SGS-THOMSON Microelectronics (or-
der TS5077-2).
X
7
0
X
6
0
H(W) = Z
X
5
0
Bit Number
set Hybal1 to Bi-Quad or 1st order;
program pole and zero frequency.
program zero frequency in Hybal2 filter;
settings = Please refer to software
TS5077-2.
X
4
0
L
’ /(Z
X
3
0
R
T
O to VF
X
2
0
+ Z
L
’ then the echo path trans-
L
X
1
0
’)
X
X
0
0
I is :
TS5070 - TS5071
By Pass Hybal 1
Filter
Pole/zero Setting
Function
(1)
L
. If the
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