LM81EVAL National Semiconductor, LM81EVAL Datasheet - Page 8

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LM81EVAL

Manufacturer Part Number
LM81EVAL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM81EVAL

Lead Free Status / RoHS Status
Not Compliant
www.national.com
SERIAL BUS TIMING CHARACTERISTICS
AC Electrical Characteristics
The following specifications apply for +2.8V
face limits apply for T
t
Symbol
TIMEOUT
t
t
C
rise
t
fall
t
t
t
t
1
2
3
4
5
L
SMBCLK (Clock) Period
SMBCLK and SMBData Rise Time
SMBCLK and SMBData Fall Time
Data In Setup Time to SMBCLK High
Data Out Stable After SMBCLK Low
SMBData Low Setup Time to SMBCLK Low
(start)
SMBData High Hold Time After SMBCLK
High (stop)
SMBData or SMBCLK low time required to
reset the Serial Bus Interface to the Idle
State
Capacitive Load on SMBCLK and SMBData
A
= T
J
= T
MIN
Parameter
to T
MAX
FIGURE 1. Serial Bus Timing Diagram
DC
; all other limits T
V
+
+3.8V
DC
8
on SMBCLK and SMBData, unless otherwise specified. Bold-
A
= T
Conditions
J
= 25˚C. (Note 15)
(Note 9)
Typical
31
(Note 10)
Limits
300
100
100
100
400
2.5
25
35
1
0
DS100072-4
ms (max)
pF (max)
µs (max)
ns (max)
ms (min)
µs (min)
ns (min)
ns (min)
ns (min)
ns (min)
(Limits)
Units
ms