LM81EVAL National Semiconductor, LM81EVAL Datasheet - Page 4

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LM81EVAL

Manufacturer Part Number
LM81EVAL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM81EVAL

Lead Free Status / RoHS Status
Not Compliant
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INT
DACOut/NTEST_IN
RESET
GND
Vccp2
+12Vin
+5Vin
+3.3Vin
+2.5Vin
Vccp1
VID4-VID0
TOTAL PINS
Pin Description
Name(s)
Pin
Number
20-24
Pin
10
11
12
13
14
15
16
17
18
19
(Continued)
Number
of Pins
24
1
1
1
1
1
1
1
1
1
1
5
Digital Output
Analog
Output/Digital
Input
Digital I/O
GROUND
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Digital Inputs
Type
Interrupt active low open-drain output. This output is enabled when
Bit 1 in the Configuration Register is set to 1. The default state is
disabled.
0V to +1.25V amplitude 8-bit DAC output. When forced high by an
external voltage the NAND Tree Test mode is enabled which
provides board-level connectivity testing. Refer to Section 11.0 on
NAND Tree testing.
Master Reset, 5 mA driver (open-drain), active low output with a
20 ms minimum pulse width. Available when enabled via Bit 4 in
the Configuration register. It acts as an active low power on
RESET input.
Internally connected to all circuitry. The ground reference for all
analog inputs and the DAC output. This pin needs to be
connected to a low noise analog ground plane for optimum
performance of the DAC output.
Analog input for monitoring −12V or Vccp2. Selectable by
choosing the appropriate external resistor divider values such that
the input to the LM81 is scaled to +2.5V. See Section 4.0.
Analog input for monitoring +12V.
Analog input for monitoring +5V.
Analog input for monitoring +3.3V.
Analog input for monitoring +2.5V.
Analog input for monitoring Vccp, a processor voltage that is
nominally at +2.5V.
Supply Voltage readouts from the Pentium/PRO power supplies
that indicate the operating voltage or the processor (e.g. 1.5V to
2.9V). The values are read in the VID/Fan Divisor Register and
the VID4 Register.
4
Description