IDT82V3380PF8 IDT, Integrated Device Technology Inc, IDT82V3380PF8 Datasheet - Page 124
IDT82V3380PF8
Manufacturer Part Number
IDT82V3380PF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT82V3380PF8.pdf
(170 pages)
Specifications of IDT82V3380PF8
Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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7.2.7
T0_DPLL_APLL_PATH_CNFG - T0 DPLL & APLL Path Configuration
Programming Information
IDT82V3380
Address: 55H
Type: Read / Write
Default Value: 00000X0X
T0_APLL_PATH
7 - 4
3 - 2
1 - 0
Bit
7
3
T0 / T4 DPLL & APLL CONFIGURATION REGISTERS
T0_ETH_OBSAI_16E1_16T1_SEL[1:0]
T0_12E1_24T1_E3_T3_SEL[1:0]
T0_APLL_PA
T0_APLL_PATH[3:0]
TH2
6
Name
T0_APLL_PA
TH1
5
These bits select an input to the T0 APLL.
0000: The output of T0 DPLL 77.76 MHz path. (default)
0001: The output of T0 DPLL 12E1/24T1/E3/T3 path.
0010: The output of T0 DPLL 16E1/16T1 path.
0011: The output of T0 DPLL ETH/OBSAI/16E1/16T1 path.
0100: The output of T4 DPLL 77.76 MHz path.
0101: The output of T4 DPLL 12E1/24T1/E3/T3 path.
0110: The output of T4 DPLL 16E1/16T1 path.
0111: The output of T4 DPLL GSM/GPS/16E1/16T1 path.
1XXX: Reserved.
These bits select an output clock from the T0 DPLL ETH/OBSAI/16E1/16T1 path.
00: 16E1.
01: 16T1.
10: ETH.
11: OBSAI.
The default value of the T0_ETH_OBSAI_16E1_16T1_SEL0 bit is determined by the SONET/SDH pin dur-
ing reset.
These bits select an output clock from the T0 DPLL 12E1/24T1/E3/T3 path.
00: 12E1.
01: 24T1.
10: E3.
11: T3.
The default value of the T0_12E1_24T1_E3_T3_SEL0 bit is determined by the SONET/SDH pin during
reset.
T0_APLL_PA
TH0
4
16E1_16T1_SEL1
T0_ETH_OBSAI_
124
3
16E1_16T1_SEL0
T0_ETH_OBSAI_
Description
2
SYNCHRONOUS ETHERNET WAN PLL
T0_12E1_24T1_
E3_T3_SEL1
1
October 20, 2008
T0_12E1_24T1_
E3_T3_SEL0
0
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