SC2200UFH-300 AMD (ADVANCED MICRO DEVICES), SC2200UFH-300 Datasheet - Page 314

• Manufacturer Part Number: SC2200UFH-300
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC2200UFH-300

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

F4BAR2+Memory Offset 24h
F4BAR2+Memory Offset 20h
3)
326
Video Data Even Base
Video Data Odd Base
Capture video fill sequence
Controller empty sequence
Field Interrupt.
When the field interrupt occurs on the completion of an
odd field, the interrupt must program the Video Data
Odd Base Address with the other buffer’s address.
The odd field will ping-pong between the two buffers.
When the interrupt is due to the completion of an even
field, the interrupt handler must program the GX1
module’s
(GX_BASE+Memory Offset 8320h) with the address
of the frame (both odd and even fields) that was just
received from the VIP block. This new address will not
take affect until the start of a new frame. It must also
program the Video Data Even Base Address with the
other buffer so that the even field will ping-pong just
like the odd field. The field just received can be known
by reading the Current Field bit (F4BAR2+Memory
Offset 08h[24]).
GX1 Module’s Display
85 frames per second
Figure 7-6. Capture Video Mode Weave Example Using Two Video Frame Buffers
30 frames per second
video
Ping-pongs between the two buffers during runtime
32580B
buffer
Video Frame Buffer #1
Line 1 Odd Field
Line n Odd Field
Line n-1 Odd Field
Line n-1 Even Field
Line 2 Odd Field
start
Buf #1
Line 1 Even Field
Line 2 Even Field
Line n Even Field
1
2
offset
Buf #2
1 2 3 4
3
4
value
5
5
5
5
GX_BASE+Memory Offset 8320h
6
F4BAR2+Memory Offset 20h
F4BAR2+Memory Offset 24h
GX1 Module’s Video Frame Buffer
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
two buffers during runtime
Video Data Even Base
Video Data Even Base
Ping-pongs between the
Odd and Even fields are
VID_START_OFFSET
7.2.1.3
There are three types of VBI data defined by the CCIR-656
protocol: Task A data, Task B data, and Ancillary data. The
VIP block supports the capture for each data type. Gener-
ally Task A data is the data type captured. Just as in Cap-
ture Video mode, there are three registers that tell the bus
master where to put the raw VBI data in the GX1 module’s
frame buffer. Once the raw VBI data has been captured,
the data can be manipulated or decoded. The data can
also be used by an application. An example of this would
be an Internet address that is encoded on one or more of
the VBI lines, or have an application decode the Closed
Captioning information put in the graphics frame buffer.
The registers, F4BAR2+Memory Offset 40h, 44h, and 48h,
tell the bus master the destination addresses for the VBI
data in the GX1 module’s frame buffer. Five bits
(F4BAR2+Memory Offset 00h[21:17]) are used to tell the
bus master the data types to store. Capture VBI mode
needs
04h[9,1:0]. The Field Interrupt bit (F4BAR2+Memory Offset
04h[16]) should be used by the software driver to know
when the captured VBI data has been completed for a field.
7
7
“Weaved” together
8
to
9
Capture VBI Mode
be
10
AMD Geode™ SC2200 Processor Data Book
enabled
11
11
12
13
at
Video Frame Buffer #2
14
F4BAR2+Memory Offset
Line n-1 Odd Field
Line n-1 Even Field
Line 1 Odd Field
Line 2 Odd Field
Line n Odd Field
Line 1 Even Field
Line 2 Even Field
Line n Even Field
Video Processor Module
15
15
16
21
17
22
18
18
23