TDA4856/V6,112 NXP Semiconductors, TDA4856/V6,112 Datasheet - Page 30

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TDA4856/V6,112

Manufacturer Part Number
TDA4856/V6,112
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA4856/V6,112

Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
Pulse diagrams
2003 Sep 30
handbook, full pagewidth
I
PC monitors
2
C-bus autosync deflection controller for
vertical oscillator sawtooth
differential output currents
vertical blanking pulse
vertical blanking pulse
at HUNLOCK (pin 17)
VOUT1 (pin 13) and
EW drive waveform
at EWDRV (pin 11)
vertical sync pulse
at VCAP (pin 24)
at CLBL (pin 16)
VOUT2 (pin 12)
internal trigger
inhibit window
(typical 4 ms)
4.0 V
3.8 V
inhibited
Fig.14 Pulse diagram for vertical part.
1.4 V
automatic trigger level
synchronized trigger level
I VOUT1
I VOUT2
30
DC shift 3.6 V maximum
7.0 V maximum
low-level 1.2 V fixed
Product specification
MGM075
TDA4856

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