ICS85454AKT IDT, Integrated Device Technology Inc, ICS85454AKT Datasheet - Page 6

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ICS85454AKT

Manufacturer Part Number
ICS85454AKT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS85454AKT

Function
Clock Multiplexer
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
VFQFN
Pin Count
16
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
W
R
I
CLK/nCLK I
For applications not requiring the use of a differential input, both
the CLK and nCLK pins can be left floating. Though not required,
but for additional protection, a 1kΩ resistor can be tied from CLK
to ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
IDT
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
NPUTS
ECOMMENDATIONS FOR
ICS85454
DUAL 2:1 AND 1:2 DIFFERENTIAL-TO-LVDS MULTIPLEXER
IRING THE
/ ICS
:
DUAL 2:1 AND 1:2 LVDS MULTIPLEXER
ONTROL
NPUT
D
IFFERENTIAL
:
P
INS
:
U
NUSED
I
NPUT TO
F
IGURE
I
Single Ended Clock Input
NPUT AND
A
A
1. S
PPLICATION
CCEPT
INGLE
O
S
UTPUT
INGLE
C1
0.1u
E
NDED
V_REF
DD
/2 is
E
P
S
NDED
INS
I
IGNAL
NFORMATION
6
L
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
O
LVDS
All unused LVDS output pairs can be either left floating or
terminated with 100Ω across. If they are left floating, we
recommend that there is no trace attached.
1K
R1
1K
R2
D
EVELS
RIVING
UTPUTS
VDD
nCLKx
CLKx
D
:
IFFERENTIAL
I
NPUT
ICS85454 REV. B FEBRUARY 24, 2009
DD
= 3.3V, V_REF should be 1.25V

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