MCM20027IBMN Freescale, MCM20027IBMN Datasheet - Page 59

• Manufacturer Part Number: MCM20027IBMN
• Manufacturer: Freescale
• Type: CMOSr

Specifications of MCM20027IBMN

• Sensor Image Color Type: Monochrome
• Sensor Image Size Range: >= 480,000Pixels
• Sensor Image Size: 1280x1024Pixels
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 40C
• Package Type: CLCC
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Supplier Unconfirmed

The
time definition); Table 53
6 MCLK’s wide. A maximum of 64 MCLK‘s can be programmed for the shs delay and another 64 MCLK‘s for the shr
delay, for a total 0f 128 MCLK‘s. Note! writing 00h to either of these Registers will write a maximum timing delay of
64 MCLK‘s. i.e. 00 = 64 MCLK
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MOTOROLA, INC. 2002
Address
Address
Number
msb (7)
msb (7)
Internal Timing Control Register 1 (shs time definition); Table 52
5 - 0
5F
57
7-6
Bit
x
1
0
x
h
h
Row Read-
Function
Readout
Column
Unused
shs
out
x
x
6
6
Table 52. Internal Timing Control Register 1 (shs time definition)
are used to define the size of internal timing pulse widths. In default, both shs and shr are
1
0
1
0
Unused
shs[5:0] = 000000
shs[5:0] = 000001
shs[5:0] = 000010
shs[5:0] = 000011
shs[5:0] = 111111
Table 51. Greycode and Readout Control Register
b
b
b
b
Freescale Semiconductor, Inc.
shs[5]
= Reverse Readout (Top to Bottom)
= Normal Readout (Bottom to Top)
= Reverse Readout (Right to Left)
= Normal Readout (Left to Right
For More Information On This Product,
x
5
5
Greycode and Readout Control
Go to: www.freescale.com
|
|
Internal Timing Control
shs[4]
b
b
b
b
b
x
4
4
= 64 MCLKs Wide
= 1
= 2
= 3
= 63
d
d
d
d
MCLKs Wide
MCLKs Wide
MCLKs Wide
MCLKs Wide
Description
shs[3]
gcr
3
3
and
,Internal Timing Control Register 2 (shr
shs[2]
gcc
2
2
Revision 8.4 - 24 Oct 2002 :
shs[1]
ImageMOS
rrr
ImageMOS
1
1
Default
Default
001010b
shs[0]
Reset
State
lsb (0)
lsb (0)
0A
04
rrc
0
0
xx
b
b
h
h
MCM20027
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