CYIL1SN3000AA-GZDC Cypress Semiconductor Corp, CYIL1SN3000AA-GZDC Datasheet - Page 23

• Manufacturer Part Number: CYIL1SN3000AA-GZDC
• Description: Image Sensor Monochrome CMOS 1696x1710Pixels 369-Pin uPGA
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOSr

Specifications of CYIL1SN3000AA-GZDC

• Sensor Image Color Type: Monochrome
• Operating Supply Voltage (typ): 2.5V
• Operating Temp Range: 0C to 60C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Package: 369uPGA
• Image Size: 1696x1710 Pixels
• Color Sensing: Monochrome
• Operating Temperature: 0 to 60 °C
• Operating Supply Voltage: 2.25 to 2.75 V
• Lead Free Status / RoHS Status: Compliant

Training (b0001100 / d12)
This register allows switching between different readout modes. Bits <7:2> are ignored.
■
■
■
Table 25. Training Register
Black_ref (b0001101 / d13)
This register controls the DAC that sets the dark level for the ADC. The analog output of the DAC corresponds with the all 0 code of
the ADC. The DAC has an 8-bit resolution and outputs between VAA2V5 and 0V. This means that the step size corresponds with
about 9.8 mV. The DAC itself outputs between VAA2V5 and 0V, but the buffering circuit that follows after the DAC clips the voltage
close to ground and supply.
Table 26. Black_Ref Register
Bias_col_load (b0001110 / d14)
This register controls the biasing current of the column load. A higher biasing current has the following effects:
■
■
■
Bias current changes 1.56 µA per LSB. Bits <7:6> are ignored.
Table 27. Bias_col_load Register
Document Number: 001-44335 Rev. *C
Training_en, bit<0>
Bypass_mode, bit<1>
Analog_out_en, bit<2>
Training_en, bit<0>. In bypass mode, this bit is evaluated and determines if the training pattern or test image is transmitted.
Bypass_mode, bit<1>. This bit allows the sensor to switch between normal readout of an image and readout for testing or training
purposes.
Analog_out_en, bit<2>.This bit activates the analog output of the sensor. The analog value of column<1696> is brought to the output.
Faster settling on the pixel columns
Increased power consumption from Vpix.
Lower dark level
Value (Bit<5:0>)
On startup
On startup
On startup
On startup
On startup
00000000
00000001
11111111
000000
111111
Value
Value
…
…
1
0
0
1
0
1
In bypass mode, the training pattern is transmitted
In bypass mode, the test image is transmitted
0
Normal readout of captured images
Bypass mode readout. The content of register TRAINING_EN is evaluated.
0
Analog output disabled
Analog output enabled
0
Bias current is 0A
Maximum bias current
001000 (13.6 µA)
Output of DAC is VAA2V5
Output of DAC is VAA2V5-9.8mV
Output of DAC is 0V
01100110
PRELIMINARY
Effect
Effect
Effect
CYIL1SN3000AA
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