AT94K10AL-25DQC Atmel, AT94K10AL-25DQC Datasheet - Page 33
AT94K10AL-25DQC
Manufacturer Part Number
AT94K10AL-25DQC
Description
Manufacturer
Atmel
Datasheet
1.AT94K10AL-25DQC.pdf
(204 pages)
Specifications of AT94K10AL-25DQC
Device System Gates
10000
Propagation Delay Time
12.7ns
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT94K10AL-25DQC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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1138I–FPSLI–1/08
Table 3-7.
Bit
SCR54
SCR55
SCR56
SCR57
SCR58 - SCR59
SCR60 - SCR61
SCR62
SCR63
FPSLIC System Control Register (Continued)
Description
0 = AVR Port D I/O With 6 mA Drive
1 = AVR Port D I/O With 20 mA Drive
0 = AVR Port E I/O With 6 mA Drive
1 = AVR Port E I/O With 20 mA Drive
0 = Disable XTAL Pin (R
1 = Enable XTAL Pin (R
0 = Disable TOSC2 Pin (R
1 = Enable TOSC2 Pin (R
Reserved
SCR61 = 0, SCR60 = 0 “1”
SCR61 = 0, SCR60 = 1 AVR System Clock
SCR61 = 1, SCR60 = 0 Timer Oscillator Clock (TOSC1)
SCR61 = 1, SCR60 = 1 Watchdog Clock
Global Clock 6 mux select (set by using the AT94K Device Options in System
Designer).
Note:
0 = Disable CacheLogic Writes to FPGA by AVR
1 = Enable CacheLogic Writes to FPGA by AVR
0 = Disable Access (Read and Write) to SRAM by FPGA
1 = Enable Access (Read and Write) to SRAM by FPGA
1. The AS2 bit must be set in the ASSR register.
feedback
feedback
feedback
feedback
)
)
)
)
AT94KAL Series FPSLIC
(1)
33
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