AT94K10AL-25DQC Atmel, AT94K10AL-25DQC Datasheet - Page 134
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT94K10AL-25DQC
Manufacturer Part Number
AT94K10AL-25DQC
Description
Manufacturer
Atmel
Datasheet
1.AT94K10AL-25DQC.pdf
(204 pages)
Specifications of AT94K10AL-25DQC
Device System Gates
10000
Propagation Delay Time
12.7ns
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT94K10AL-25DQC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 134 of 204
- Download datasheet (4Mb)
134
AT94KAL Series FPSLIC
UART0 Control and Status Registers – UCSR0A
UART1 Control and Status Registers – UCSR1A
• Bit 7 - RXC0/RXC1: UART Receive Complete
This bit is set (one) when a received character is transferred from the Receiver Shift register to
UDRn. The bit is set regardless of any detected framing errors. When the RXCIEn bit in UCS-
RnB is set, the UART Receive Complete interrupt will be executed when RXCn is set (one).
RXCn is cleared by reading UDRn. When interrupt-driven data reception is used, the UART
Receive Complete Interrupt routine must read UDRn in order to clear RXCn, otherwise a new
interrupt will occur once the interrupt routine terminates.
• Bit 6 - TXC0/TXC1: UART Transmit Complete
This bit is set (one) when the entire character (including the stop bit) in the Transmit Shift regis-
ter has been shifted out and no new data has been written to UDRn. This flag is especially useful
in half-duplex communications interfaces, where a transmitting application must enter receive
mode and free the communications bus immediately after completing the transmission.
When the TXCIEn bit in UCSRnB is set, setting of TXCn causes the UART Transmit Complete
interrupt to be executed. TXCn is cleared by the hardware when executing the corresponding
interrupt handling vector. Alternatively, the TXCn bit is cleared (zero) by writing a logic 1 to the
bit.
• Bit 5 - UDRE0/UDRE1: UART Data Register Empty
This bit is set (one) when a character written to UDRn is transferred to the Transmit shift register.
Setting of this bit indicates that the transmitter is ready to receive a new character for
transmission.
When the UDRIEn bit in UCSRnB is set, the UART Transmit Complete interrupt will be executed
as long as UDREn is set and the global interrupt enable bit in SREG is set. UDREn is cleared by
writing UDRn. When interrupt-driven data transmittal is used, the UART Data Register Empty
Interrupt routine must write UDRn in order to clear UDREn, otherwise a new interrupt will occur
once the interrupt routine terminates.
UDREn is set (one) during reset to indicate that the transmitter is ready.
• Bit 4 - FE0/FE1: Framing Error
This bit is set if a Framing Error condition is detected, i.e., when the stop bit of an incoming char-
acter is zero.
The FEn bit is cleared when the stop bit of received data is one.
• Bit 3 - OR0/OR1: OverRun
Bit
$0B ($2B)
Read/Write
Initial Value
Bit
$02 ($22)
Read/Write
Initial Value
7
RXC0
R
0
7
RXC1
R
0
6
TXC0
R/W
0
6
TXC1
R/W
0
5
UDRE0
R
1
5
UDRE1
R
1
4
FE0
R
0
4
FE1
R
0
3
OR0
R
0
3
OR1
R
0
2
-
R
0
2
-
R
0
1
U2X0
R/W
0
1
U2X1
R/W
0
0
MPCM0
R/W
0
0
MPCM1
R/W
0
1138I–FPSLI–1/08
UCSR0A
UCSR1A
Related parts for AT94K10AL-25DQC
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![AT94K10AL-25AJC](/photos/6/70/67047/453-84-plcc_tmb.jpg)
Part Number:
Description:
IC FPSLIC 10K GATE 25MHZ 84PLCC
Manufacturer:
Atmel
Datasheet:
![AT94K10AL-25AQC](/photos/6/70/67048/313-100-tqfp_tmb.jpg)
Part Number:
Description:
IC FPSLIC 10K GATE 25MHZ 100TQFP
Manufacturer:
Atmel
Datasheet:
![AT94K10AL-25AJI](/photos/6/70/67047/453-84-plcc_tmb.jpg)
Part Number:
Description:
IC FPSLIC 10K GATE 25MHZ 84PLCC
Manufacturer:
Atmel
Datasheet:
![AT94K10AL-25AQI](/photos/6/70/67048/313-100-tqfp_tmb.jpg)
Part Number:
Description:
IC FPSLIC 10K GATE 25MHZ 100TQFP
Manufacturer:
Atmel
Datasheet:
![AT94K10AL-25BQU](/photos/6/72/67244/144l1-lqfp_tmb.jpg)
Part Number:
Description:
IC FPSLIC 10K GATE 25MHZ 144LQFP
Manufacturer:
Atmel
Datasheet:
![AT94K10AL-25DQU](/photos/6/73/67311/313-208-pqfp_tmb.jpg)
Part Number:
Description:
IC FPSLIC 10K GATE 25MHZ 208PQFP
Manufacturer:
Atmel
Datasheet:
![AT94K10AL-25BQC](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
Manufacturer:
Atmel
Datasheet:
![at94k10al](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
At94k05al 5k - 40k Gates Of At40k Fpga With 8-bit Microcontroller, Up To 36k Bytes Of Sram And On-chip Jtag Ice
Manufacturer:
ATMEL Corporation
Datasheet:
![AT94K10AL-25DQI](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array FPSLIC 10K GATE 8B 8B AVR 25MHZ TEMP
Manufacturer:
Atmel
![AT94K10AL-25AJU](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array ASICS
Manufacturer:
Atmel
![AT94K10AL-25BQI](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array FPSLIC 10K GATE 8B 8B AVR 25MHZ TEMP
Manufacturer:
Atmel
![ATSTK600](/photos/9/20/92038/atstk600_tmb.jpg)
Part Number:
Description:
DEV KIT FOR AVR/AVR32
Manufacturer:
Atmel
Datasheet:
![U641B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
![U4082B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet: