SAA7113HV2 NXP Semiconductors, SAA7113HV2 Datasheet - Page 21

• Manufacturer Part Number: SAA7113HV2
• Manufacturer: NXP Semiconductors

Specifications of SAA7113HV2

• Video Resolution (max): 720Pixels
• Pin Count: 44
• Package Type: PQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14232
Product data sheet
8.6 Clock generation circuit
The internal CGC generates all clock signals required for the video input processor. The
internal signal LFCO is a digital-to-analog converted signal provided by the horizontal
PLL. It is the multiple of the line frequency: 6.75 MHz = 429
6.75 MHz = 432
Internally the LFCO signal is multiplied by a factor of 2 and 4 in the PLL circuit (including
phase detector, loop filtering, VCO and frequency divider) to obtain the output clock
signals. The rectangular output clocks have a 50 % duty factor.
Table 4:
Clock
XTAL
LLC
LLC2 (internal)
LLC4 (internal)
LLC8 (virtual)
Fig 20. Block diagram of clock generation circuit
LFCO
Clock frequencies
BAND PASS
FC = LLC/4
f
H
(60 Hz).
Rev. 02 — 9 May 2005
DETECTION
CROSS
ZERO
DETECTION
PHASE
Frequency (MHz)
24.576
27
13.5
6.75
3.375
DIVIDER
FILTER
LOOP
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
1/2
9-bit video input processor
f
H
(50 Hz) or
SAA7113H
OSCILLATOR
DIVIDER
1/2
mhb330
21 of 75
LLC
LLC2